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Re: Simulation Examples
I checked it out, thank you. Still, I'd implore the community, I myself included, to include simulations and their detailed explanations in our example projects as much as we can. Deploying designs physically is still the end goal but the simulation/verification skills are increasingly crucial and the software provided to do this would best be trained for and used. I also think that this would continue to lessen the complexities facing beginners getting into FPGA design. Thank you.211Views0likes0CommentsReported Disk Usage
I have Quartus Pro 25.1.0.129 on my Windows 10 Pro 64-bit. I have installed, uninstalled and reinstalled some of the modules over time. These include the Agilex range and the huge EDA simlib file. When I track the disk usage in the Control Panel, Quartus doesn't update to reflect a lower disk usage when a module has been uninstalled. For example, I installed the EDA simlib to compile the libraries for a third party simulator then removed the file because it took up about 40GB of space. However, on the reported disk usage, the total amount still includes this 40GB. I have also observed that if you install the devices, remove them then reinstall them, the reported disk usage will be equivalent to double the correct usage. Is there a file that you can modify to change this to reflect the correct storage space used?220Views0likes3CommentsSimulation Examples
Are there any project examples that actually incorporate and show simulation? Take the "hello world" example, is there any walkthrough of a simulation using the available simulation resources like the eda simlib and the simulation softwares from Altera and other vendors? It's all nice that I can use platform designer to put together a project but verification begins with simulation and there is little to no examples of that. Obviously there's manuals to read but I argue that relatively simple pure-rtl and IP-based designs should have simulations to accompany them because those are usually the projects to on-board beginners. It would really encapsulate nearly all of the design process for a beginner having an example project video/document showing design from platform designer to the RISC-free IDE to simulation/verification and then to programming. I am sorry if there's already some out there which I haven't come across due to not doing a thorough search. If anyone could point me to such simulation-specific resources, I would be grateful. I would also have this as a suggestion for a video/series on the training platform.432Views0likes2CommentsRe: Software Development Tools
From what I gathered, Ashling RiscFree IDE can be used for all hard and sofcore processors software development of the 10 series and Agilex devices since it supports both Risc-V and ARM ISAs while Arm-DS can only be used for Arm HPS processors but supports all Altera FPSoCs. Hence, for example, if I plan to use the Agilex 5 or Arria 10 SoC devices, all I need is the RiscFree IDE for all software development for both the Nios-V and HPS processor cores. If I was using the Cyclone-V SoC devices, I would need RiscFree for the Nios soft processor then Arm-DS for the HPS. Correct me if wrong. Thank you920Views0likes1CommentRe: Platform Designer UI
It's mostly just boils down to the UI in my experience and that was the feedback provided by you to the development team. Some IPs like the HPS are quite lengthy on their connections. Of course you can filter by connections to make the connecting process easier but I just wonder whether a block design approach like in Simulink would be better now with increasing I/O count for IPs. This would be my main suggestion. I am assuming this being a major upgrade, it would not just happen in the next release but would be scheduled for something like the PD nextgen you mentioned planned for next year or later. Other issues highlighted before on this thread by me could be resolved by just increasing the user customizability of Platform Designer's UI especially the scaling. Long menus could be made to resize better than they do or split into two columns if the screen resolution is like my 1366x768 or smaller. Thank you, Njoroge.2KViews0likes0CommentsRe: Platform Designer UI
While we're at it, I also would ask whether the whole Quartus software tool is up for a rework. From my point of view, the tools at the moment are still quite similar to those that were used when FPGAs were largely used for prototyping digital circuits and as such the design was more from an HDL approach than IPs. Now with increased FPGA/FPSoC applications like AI, compute acceleration, RF and more, doesn't that warrant a redesign of the entire software suite? I am also of the opinion that the three seperate ways that Quartus is shipped might be stifling time and resource allocation into developing one software tool that works for all devices. That would enable that one software tool to be as perfect as possible since the software development team focuses all their resources and time on just the one. The hardware side of things, like the new Agilex devices, is looking like it's outpacing the software tools for it, case in point the Platform Designer being discussed. All in all, thank you for the feedback provided to the development team on my behalf. Njoroge.2.2KViews0likes2CommentsRe: Platform Designer UI
If you save a layout and wish to switch to it, there's an option of using keyboard shortcuts. However, the shortcuts are the exact same ones for the defualt layouts shipped with Platform Designer. For example, if I save my first layout file, it will defualt to keyboard shortcut "ctrl + 1". This shortcut however is also the same for the "default IP layout" option so using that shortcut will switch to PD's default IP layout rather than my layout. The screen resolution was 1920 x 1080. I was able to switch to my layout by pointer but as I said that only works for that project at that time. Opening a new project, or existing project or closing Quartus and returning to it at a later time will have PD back to its default layout. I would also add that the fonts in PD scale worse in font size compared to those in Quartus. It's like PD is a completely isolated software from Quartus.2.4KViews0likes0Comments