KianHinT_altera
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Re: How can I use Quartus Pro 25.1 sopc-create-header-files tool to generate a jtag master header file?
Hi DLiu5, Apologies and thanks for confirming your path is correct. I've tested on my Windows 11 pc with Windows Quartus 25.1.1 and I could observe 2 things 1. Error A: 'sopc-create-header-files' is not recognized as an internal or external command, operable program or batch file. or Error B: sopc-create-header-files: command not found Depending on where the script is called (both in Nios V command shell), either in windows directory or WSL (via bash) or Error C: Environment variable QUARTUS_ROOTDIR is empty. Do you have Quartus II installed? Solution: ensure both Path are set correctly i)QUARTUS_ROOTDIR="C:/altera_pro/25.1.1/quartus" ii)PATH="$QUARTUS_ROOTDIR/sopc_builder/bin:$PATH" 2. Error A Failed writing output file to /sopc-create-header-files.38.tmp.swinfo sopc- create-header-files: sopcinfo2swinfo.exe --input=c:/my_de25_nano_workplace/my_first_qsys_system/qsys_top/qsys_top.sopcinfo --output=/sopc-create-header-files.38.tmp.swinfo failed Solution: I suspect this is because the sopc-create-header-files script is using hardcoded /tmp/ folder (as per linux) but in WSL it still following Windows directory formatting. Note: I edited the sopc-create-header-files script so that instead of using hardcoded /tmp/ folder, use the current working directory and convert the path into Windows directory format 1) if [ "${_IS_WSL}" = "1" ]; then swinfo_tmp_fname="$PWD/${PN}.$$.tmp.swinfo" fi 2) if [ "${_IS_WSL}" = "1" ]; then swinfo_tmp_fname="$(adjust_path_mixed "$swinfo_tmp_fname")" fi In my terminal I'm using these commands (I do not have any path set in my windows environment variables so need to export each time terminal is launched) bash export QUARTUS_ROOTDIR="/mnt/c/altera_pro/25.1.1/quartus" export PATH="$QUARTUS_ROOTDIR/sopc_builder/bin:$PATH" sopc-create-header-files hps_subsys.sopcinfo I will check with our factory team on this to confirm the solution and also any plans to change the script. Thanks Regards KianRe: Support Request to Debug Signal Tap Issue with SoC Based Design(GHRD) on Agilex-7 FPGA
Dear Customer, As we do not hear back from your end and case have been idling awhile, we will step back and allow the community to assist with any future follow-up questions. Thank you for engaging with us! Best regards, Altera Technical SupportRe: Timings eMMC
Hi ohfpga1 , Sorry for the delay, our factory team only provided the screenshots as per my previous comments as they only have these timing specs and mentioned that they would like to understand further on your query, what are the specs or data you're looking for. Thanks Regards KianRe: Agilex 5E ES Memory Performance Issues
Hi PHe, Regarding the memory test result or performance data, I would suggest contacting your local DFAE/FAE guys on this, whether do they have the benchmark data already by running on Agilex5 production example design or DFAE/FAE to submit a request via APS channel. Sorry about this as we do not publish out engineering benchmarking data. Thanks Regards Kian
