KianHinT_alteraFrequent ContributorJoined 3 years ago344 Posts71 LikesLikes received21 SolutionsView All Badges
ContributionsMost RecentMost LikesSolutionsRe: AI Suite - Streaming from HPS to DLA IP Hi Mads_From_Denmark Regarding your question on FPGA AI Suite, unfortunately the create hps image script is hardcoded to support only the official Agilex 5, 7 and Arria10 devkit only, thus it will not support DE25-NANO as the hardware is different even though it is based on Agilex5. Changing the script might be a hassle as you have rewrite yocto recipes, change the configuration for uboot DTS, and edit the changes to suit DE25. FYI SOC embedded development suite have been discontinued for some time already. https://www.rocketboards.org/foswiki/Documentation/SoCEDS Instead , I think you could try doing this 1) Start with the Terasic Linux BSP - reuse what Terasic have for your board You can refer to this Agilex 5 SoC Golden System Reference Design (GSRD) (https://altera-fpga.github.io/rel-24.1/embedded-designs/agilex-5/e-series/premium/gsrd/ug-gsrd-agx5e-premium/#gsrd-overview) It contains the steps to enable Linux on Agilex 5 devkit. While it uses the official Dev Kits as examples, the steps also applies to your DE25 board, just you need to change certain configuration to make it work (change the device tree uboot/linux to use DE25 instead of devkit, modify the GSRD , by right Terasic should have all these example ready for you). The GSRD covers the fundamental boot ingof Agilex 5 (Boot ROM, U-Boot, ATFF, Linux), how to compile the Linux kernel, and how the HPS communicates with the FPGA fabric. 2) Reuse the DE25 GSRD design and instantiate your HPS and DLA IP in Platform Designer and assign your memory-mapped addresses (you can refer to the GSRD for Agilex5 AI Suite example to do the porting). Use the DE25 DTS and edit it to include the DLA IP to the kernel including the base address and IRQS that is based on Platform Designer. Then compile it following the Devkit guide. Take note that we have never verified the CoreDLA design outside of those indicated devkit Thanks Regards Kian Re: S10 hps fpga2sdram bridge low speed Dear Customer, Since the thread been idling awhile , I will transition this thread to community support. Thank you for engaging with us! Best regards, Altera Technical Support Re: S10 hps fpga2sdram bridge low speed Hi Petkov_Alex , May I know whether you have any updates on this issue or is it been resolved already? Thanks Regards Kian Re: Timings eMMC Hi ohfpga1 , May I know if there is any update on your end on this? Thanks Regards Kian Re: U-Boot "Synchronous Abort" boot failure on Terasic Atum A5 Rev B via Quartus 24.3 .jic generation Dear Customer, We have not hear back from you and it has been idling for a while. We will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, we will step back and allow the community to assist with any future follow-up questions. Thank you for engaging with us! Best regards, Altera Technical Support Re: How can I use Quartus Pro 25.1 sopc-create-header-files tool to generate a jtag master header file? Hi DLiu5 , Apologies was out of office, so basically factory team for HPS and NIOS have gotten back to me on this , the script is not used for both HPS and NIOS generation in later releases. The script is part of Platform Designer in Quartus component thus they are not able to advise on the workaround or provide any plans to change the script. Additional comment for Nios side, for Nios V system.h generation, it is best to use niosv-bsp or BSP Editor, rather than using sopc-create-header-file as Nios V team didn't validate this sopc-create-header-file with Nios V. As for the PATH issue , the current Nios V Shell didn't link to sopc_builder/bin. https://docs.altera.com/r/docs/743810/25.3.1/nios-v-processor-software-developer-handbook/manual-system-path-variable-setup Thanks Regards Kian Re: Agilex7m i have configure 4GB ddr linux is not booting. I got architect time failure error. Hi Charan404 , May I ask what is the status for your issue, is it resolved already? Additionally , are you using 2 RAM slots or single slot for your 4GB? Thanks Regards Kian Re: PCIe bringup in Agilex 5 Hi Sweth , I'm assigned to this forum case and I believe that you have already had an APS case open on this and we will discuss through there. Anyway I will leave this forum post open to see anyone had any past experiences with this. Thanks Regards Kian Re: How can I use Quartus Pro 25.1 sopc-create-header-files tool to generate a jtag master header file? Hi DLiu5, Apologies and thanks for confirming your path is correct. I've tested on my Windows 11 pc with Windows Quartus 25.1.1 and I could observe 2 things 1. Error A: 'sopc-create-header-files' is not recognized as an internal or external command, operable program or batch file. or Error B: sopc-create-header-files: command not found Depending on where the script is called (both in Nios V command shell), either in windows directory or WSL (via bash) or Error C: Environment variable QUARTUS_ROOTDIR is empty. Do you have Quartus II installed? Solution: ensure both Path are set correctly i)QUARTUS_ROOTDIR="C:/altera_pro/25.1.1/quartus" ii)PATH="$QUARTUS_ROOTDIR/sopc_builder/bin:$PATH" 2. Error A Failed writing output file to /sopc-create-header-files.38.tmp.swinfo sopc- create-header-files: sopcinfo2swinfo.exe --input=c:/my_de25_nano_workplace/my_first_qsys_system/qsys_top/qsys_top.sopcinfo --output=/sopc-create-header-files.38.tmp.swinfo failed Solution: I suspect this is because the sopc-create-header-files script is using hardcoded /tmp/ folder (as per linux) but in WSL it still following Windows directory formatting. Note: I edited the sopc-create-header-files script so that instead of using hardcoded /tmp/ folder, use the current working directory and convert the path into Windows directory format 1) if [ "${_IS_WSL}" = "1" ]; then swinfo_tmp_fname="$PWD/${PN}.$$.tmp.swinfo" fi 2) if [ "${_IS_WSL}" = "1" ]; then swinfo_tmp_fname="$(adjust_path_mixed "$swinfo_tmp_fname")" fi In my terminal I'm using these commands (I do not have any path set in my windows environment variables so need to export each time terminal is launched) bash export QUARTUS_ROOTDIR="/mnt/c/altera_pro/25.1.1/quartus" export PATH="$QUARTUS_ROOTDIR/sopc_builder/bin:$PATH" sopc-create-header-files hps_subsys.sopcinfo I will check with our factory team on this to confirm the solution and also any plans to change the script. Thanks Regards Kian Re: Preloader/U-Boot Compilation Failure Hi IOzan, As we have not heard back from you and the case been idling awhile, we will step back and allow the community to assist with any future follow-up questions. Thank you for engaging with us! Best regards, Altera Technical Support