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remote farm machine setup
I am trying hard to setup the remote farm machine but successfull in this.I have searched a lot in google and i found one video related to this but very bad explanation.Please help me how to do this in design space explorer in quartus prime using ssh. Thanks in advance..!1.9KViews0likes2CommentsRe: axi interface in hls
@BoonBengT_Altera How can i remove component interface in hls code.I am getting default signals like busy,call etc, signals by default.In xilinx hls we are having ap_cntrl_none to disable that but how to do that in intel hls.It is taking more resources.2.1KViews0likes0Commentsmore io pins than in a device
Hi, i am using quartus prime pro and compiling the one of the intel's ip.It is showing more io pins than in the device.but i want to compile it to see the resource utilization. In the final design this is not the top level module.please help me how to do full compilation without worrying of io pins.in vivado we have synthesis settings to overcome this problem. Thanks in advance...!Solved1.2KViews0likes2CommentsRe: symbol creation in quartus prime pro.
Hi @SyafieqS , That video is so helpful and that i have used for ip simulation,but i am asking for block design.I have created block design using one or more ip's(interconnection),simulation can be done as per your previous answer but what i have to do to instantiate the block diagram in testbench(for ip after simulation instance code will be generated and that code i use in the testbench)..?how can i generate instace file for block design..i have block design file like this...3KViews0likes0CommentsRe: symbol creation in quartus prime pro.
Hi @SyafieqS, By using this pdf only i can able to create my own ip,and able to create block design.But how to simulate this block design using testbench like we do in xilinx by creating and instantiating the wrapper file in testbench. Thanks in advance....!3KViews0likes1Comment