Why does the Intel® FPGA Download Cables drivers installation fail on Windows* operating system?
Description Due to the expiration of the digital signature certificate of the Intel® FPGA Download Cable I (formerly referred to as USB Blaster I download cable) and the Intel® FPGA Download Cable II (formerly referred to as USB Blaster II download cable) drivers for Windows* operating system, the installation process of the drivers may fail. Follow the next steps to verify if the digital signature certificate of your driver has expired: Go to '<Quartus Installation Path>\qprogrammer\quartus\drivers\usb-blaster-ii' folder Right-click on 'usbblasterii.cat' and select 'Properties, then select the 'Digital Signatures' tab Select the 'IFDLII Production Key1' signature from the 'Signature List' and click 'Details' Click on 'View Certificate' If the driver has expired, you will see the 'This certificate has expired or is not yet valid' message Resolution A patch is available to fix this problem for the Intel® Quartus® Prime Software. Download and install Patch 0.02i for the Intel® Quartus® Prime Pro Edition Software version 20.4 and the Intel® Quartus® Prime Standard Edition Software version 21.1. Download and install Patch 0.02i for the Intel® Quartus® Prime Pro Edition Programmer and Tools or Patch 0.02stdp for the Intel® Quartus® Prime Standard Edition Programmer and Tools from the appropriate link below. Download Intel® Quartus® Prime Pro Edition Software version 20.4 patch 0.02i for Windows (.exe) Download the Readme for Intel® Quartus® Prime Pro Edition Software version 20.4 patch 0.02i (.txt) Download Intel® Quartus® Prime Standard Edition Software version 21.1patch 0.02stdp for Windows (.exe) Download the Readme for Intel® Quartus® Prime Standard Edition Software version 21.1 patch 0.02stdp (.txt) After installing patch 0.02i or patch 0.02stdp for Windows, follow the next steps to update the driver on the operating system: Connect your Intel FPGA download cable or Intel FPGA download cable II Open Device Manager window of Windows* OS Choose Windows Settings from Start menu > Type “Device Manager” into the search area > Choose Device Manager Find Altera USB-Blaster II under JTAG cables or Altera USB-Blaster under Universal Serial Bus controllers Find USB-Blaster or USB-Blaster II under Other devices Choose Altera USB-Blaster or Altera USB-Blaster II Right-click and choose Update driver from the context menu Choose Browse my computer for driver software on the Update Drivers window Enter the following path for the driver and enable; include subfolders - <Intel Quartus Prime software install directory>\quartus\drivers or - <Intel Quartus Prime Programmer install directory>\qprogrammer\drivers or - <Intel Quartus Prime Programmer install directory>\qprogrammer\quartus\drivers Click Next This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.1.Why does the Intel® FPGA Download Cable II driver installation fail on Windows* operating system?
Description Due to the expiration of the digital signature certificate of the Intel® FPGA Download Cable II driver for Windows* operating system, the installation process of the driver may fail. Follow the next steps to verify if the digital signature certificate of your driver has expired: Go to '<Quartus Installation Path>\qprogrammer\quartus\drivers\usb-blaster-ii' folder Right click on 'usbblasterii.cat' and select 'Properties', then select the 'Digital Signatures' tab Select the 'IFDLII Production Key1' signature from the 'Signature List' and click 'Details' Click on 'View Certificate' If the driver has expired, you will see the 'This certificate has expired or is not yet valid' message Resolution To work around this problem, follow the next steps: Download an updated version of the driver from the following link Decompress the downloaded file and substitute 'usb-blaster-ii.inf' and 'usb-blaster-ii.cat' files in '<Quartus Installation Path>\qprogrammer\quartus\drivers\usb-blaster-ii' folder Launch the Windows* 'Device Manager' Locate 'Altera USB-Blaster II (JTAG interface)' node under 'JTAG cables' in the Windows* 'Device Manager', right click and select 'Update Driver' Choose ´'Browse my computer for driver software' then click on 'Search for drivers in this location' and point to the new 'usb-blaster-ii.inf' file This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 21.1.Error (297009): Can't open project -- you do not have permission to write to all the files or create new files in the project's
Description Due to a problem in the Quartus® Prime Standard and Pro Edition Software version 17.0 and earlier you may see the error message mentioned above happened intermittently if you attempt to compile multiple designs in the same directory. Resolution To work around the problem, go to Assigment -> settings -> Compilation Process Settings -> select Maximum Processors allow = 1 This problem is fixed starting with the Quartus® Prime Standard and Pro Edition Software version 17.1.Error (14703): Invalid internal configuration mode for design with memory initialization
Description You may see this error while compiling a custom FIFO or a RAM block in the Intel® Quartus® Prime Software Standard or Lite versions for an Intel® MAX® 10 device. This error is seen because Intel® MAX® 10 device compact variants do not support memory initialization. If you have not provided any mif file for your custom design and still see this error in Intel® Quartus®Prime Edition Software, it may be because a mif file is being inferred by the RTL coding style Resolution Signal declaration for memory_type should be changed from signal mem : memory_type :=(others => (others => '0')); to signal mem : memory_type; This is to ensure that memory is not initialized and there is no compilation error in the Assembler stage.How can I program the UFM with a hex/mif in Intel® MAX® 10 devices without impacting the CFM?
Description To program the User Flash Memory (UFM) with hex/mif in Intel® MAX® 10 devices without impacting the Configuration Flash Memory (CFM), do the following. Resolution Open the Convert Programming Files utility in Intel Quartus® Prime software Choose internal configuration in mode category. Go to Options/Boot info and select UFM source as load memory file. Choose a File path for your .hex or .mif file. After this process, add the SOF file to the main conversion window and generate *.pof file. Open Intel Quartus Prime Programmer. After proper recognition of the Intel MAX® 10 device, add the previously generated *.pof file and set Program / Configuration to UFM (only).Why does MAX 10 On-Chip Flash IP core read incorrect data at odd address?
Description Due to a problem of Intel® Quartus® Prime Standard Edition and Lite Edition software version 17.0 Update 2 or earlier, you may see incorrect data at odd address, when using the On-Chip Flash IP core in MAX® 10. When reading data at odd address, you may see the data of the previous address. Resolution This problem has been fixed in Intel® Quartus® Prime Standard Edition and Lite Edition software version 17.1. Update your On-Chip Flash IP core using the software version 17.1 onward and recompile your design project.Warning (169177): <number> pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing MAX 10 Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems
Description You may see the above warning when you assign 3.3/3.0/2.5-V LVTTL/LVCMOS I/O standards to input pins in Intel® MAX® 10 devices. This auto-generated message in the Intel Quartus® Prime Edition Software cannot be removed. Resolution Ignore the warning.Error: No spd files are included in quartus project
Description In the Intel® Quartus® Prime Standard Edition Software version 17.1, the error message above may be seen while executing the ip-setup-simulation script on a project targeting a device that doesn't belong to the Intel® Arria® 10, Intel® Stratix® 10, or Intel® Cyclone® 10 families. The ip-setup-simulation script requires an Intel® Arria® 10, Intel® Stratix® 10, or Intel® Cyclone® 10 Platform Designer folder structure to work properly. Resolution To work around this problem, switch from using the ip-setup-simulation script to the ip-make-simscript script. For more information on the ip-make-simscript script usage, please consult the Intel® Quartus® Prime Standard Edition Handbook Volume 1 Design and Synthesis, page 255.Error: border: Error during execution of script generate_hps_sdram.tcl: seq: add_fileset_file: No such file <hex_file>.hex
Description Due to a problem in the Quartus® Prime software version 17.1 Update 1 and earlier, you may see the error message mentioned above if you generate the HPS (Hard Processor System) system in Platform Designer. This only happens with Linux operating systems when you have not installed the “make” libraries. You may refer to the document here for Linux prerequisite libraries before using the Quartus® Prime software. This problem commonly occurs on the Ubuntu Operating System as “make” libraries are not installed by default. Resolution To work around this problem, install the make libraries on the Linux Operating System. To install the make packages, type the following command. -sudo apt-get update -sudo apt-get install build-essentialWhy is my Intel® Arria® 10 FPGA DDR4 design failing compilation in the fitter when I choose "Automatically select a location" for ALERT# pin placement?
Description If the "Automatically select a location" option is chosen in the Memory Topology/ Topology tab of the Intel® Arria® 10 FPGA DDR4 IP Editor, the IP will automatically choose a pin assignment for the mem_alert_n signal. If this option is selected and conflicting location constraints are applied to the mem_alert_n pin, fitter errors will result during compilation. The fitter errors will include these messages: Error (14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 pin(s)). Error (15307): Cannot apply project assignments to the design due to illegal or conflicting assignments. Refer to the other messages for corrective action. Resolution If you use the "Automatically select a location" option, remove all location assignments and constraints for the mem_alert_n signal in your .QSF file. Intel recommends manually placing the mem_alert_n signal in the address/command bank for optimum timing margins by choosing the "I/O Lane with Address/Command Pins" option.
