Why does the Intel® FPGA Download Cables drivers installation fail on Windows* operating system?
Description Due to the expiration of the digital signature certificate of the Intel® FPGA Download Cable I (formerly referred to as USB Blaster I download cable) and the Intel® FPGA Download Cable II (formerly referred to as USB Blaster II download cable) drivers for Windows* operating system, the installation process of the drivers may fail. Follow the next steps to verify if the digital signature certificate of your driver has expired: Go to '<Quartus Installation Path>\qprogrammer\quartus\drivers\usb-blaster-ii' folder Right-click on 'usbblasterii.cat' and select 'Properties, then select the 'Digital Signatures' tab Select the 'IFDLII Production Key1' signature from the 'Signature List' and click 'Details' Click on 'View Certificate' If the driver has expired, you will see the 'This certificate has expired or is not yet valid' message Resolution A patch is available to fix this problem for the Intel® Quartus® Prime Software. Download and install Patch 0.02i for the Intel® Quartus® Prime Pro Edition Software version 20.4 and the Intel® Quartus® Prime Standard Edition Software version 21.1. Download and install Patch 0.02i for the Intel® Quartus® Prime Pro Edition Programmer and Tools or Patch 0.02stdp for the Intel® Quartus® Prime Standard Edition Programmer and Tools from the appropriate link below. Download Intel® Quartus® Prime Pro Edition Software version 20.4 patch 0.02i for Windows (.exe) Download the Readme for Intel® Quartus® Prime Pro Edition Software version 20.4 patch 0.02i (.txt) Download Intel® Quartus® Prime Standard Edition Software version 21.1patch 0.02stdp for Windows (.exe) Download the Readme for Intel® Quartus® Prime Standard Edition Software version 21.1 patch 0.02stdp (.txt) After installing patch 0.02i or patch 0.02stdp for Windows, follow the next steps to update the driver on the operating system: Connect your Intel FPGA download cable or Intel FPGA download cable II Open Device Manager window of Windows* OS Choose Windows Settings from Start menu > Type “Device Manager” into the search area > Choose Device Manager Find Altera USB-Blaster II under JTAG cables or Altera USB-Blaster under Universal Serial Bus controllers Find USB-Blaster or USB-Blaster II under Other devices Choose Altera USB-Blaster or Altera USB-Blaster II Right-click and choose Update driver from the context menu Choose Browse my computer for driver software on the Update Drivers window Enter the following path for the driver and enable; include subfolders - <Intel Quartus Prime software install directory>\quartus\drivers or - <Intel Quartus Prime Programmer install directory>\qprogrammer\drivers or - <Intel Quartus Prime Programmer install directory>\qprogrammer\quartus\drivers Click Next This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.1.Why is the RPD endianness setting not loading correctly when loading a .cof file in the Intel® Quartus® Prime Standard or Lite Edition Software versions 18.0 and 18.1?
Description Due to a known problem in Intel® Quartus® Prime Standard and Lite Edition Software versions 18.0 and 18.1, the RPD endianness setting is not properly reflected in the .cof file. It always defaults to little endian. Resolution As a workaround, use the command line alternative "quartus_cpf." The syntax of creating a rpd file with a saved *.cof file is as follows: Execute quartus_cpf -c <cof file name>.cof <rpd file name>.rpdError (14703): Invalid internal configuration mode for design with memory initialization
Description You may see this error while compiling a custom FIFO or a RAM block in the Intel® Quartus® Prime Software Standard or Lite versions for an Intel® MAX® 10 device. This error is seen because Intel® MAX® 10 device compact variants do not support memory initialization. If you have not provided any mif file for your custom design and still see this error in Intel® Quartus®Prime Edition Software, it may be because a mif file is being inferred by the RTL coding style Resolution Signal declaration for memory_type should be changed from signal mem : memory_type :=(others => (others => '0')); to signal mem : memory_type; This is to ensure that memory is not initialized and there is no compilation error in the Assembler stage.Error (297009): Can't open project -- you do not have permission to write to all the files or create new files in the project's
Description Due to a problem in the Quartus® Prime Standard and Pro Edition Software version 17.0 and earlier you may see the error message mentioned above happened intermittently if you attempt to compile multiple designs in the same directory. Resolution To work around the problem, go to Assigment -> settings -> Compilation Process Settings -> select Maximum Processors allow = 1 This problem is fixed starting with the Quartus® Prime Standard and Pro Edition Software version 17.1.Why is my Intel® Arria® 10 FPGA DDR4 design failing compilation in the fitter when I choose "Automatically select a location" for ALERT# pin placement?
Description If the "Automatically select a location" option is chosen in the Memory Topology/ Topology tab of the Intel® Arria® 10 FPGA DDR4 IP Editor, the IP will automatically choose a pin assignment for the mem_alert_n signal. If this option is selected and conflicting location constraints are applied to the mem_alert_n pin, fitter errors will result during compilation. The fitter errors will include these messages: Error (14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 pin(s)). Error (15307): Cannot apply project assignments to the design due to illegal or conflicting assignments. Refer to the other messages for corrective action. Resolution If you use the "Automatically select a location" option, remove all location assignments and constraints for the mem_alert_n signal in your .QSF file. Intel recommends manually placing the mem_alert_n signal in the address/command bank for optimum timing margins by choosing the "I/O Lane with Address/Command Pins" option.How can I program the UFM with a hex/mif in Intel® MAX® 10 devices without impacting the CFM?
Description To program the User Flash Memory (UFM) with hex/mif in Intel® MAX® 10 devices without impacting the Configuration Flash Memory (CFM), do the following. Resolution Open the Convert Programming Files utility in Intel Quartus® Prime software Choose internal configuration in mode category. Go to Options/Boot info and select UFM source as load memory file. Choose a File path for your .hex or .mif file. After this process, add the SOF file to the main conversion window and generate *.pof file. Open Intel Quartus Prime Programmer. After proper recognition of the Intel MAX® 10 device, add the previously generated *.pof file and set Program / Configuration to UFM (only).Info (176311): Pin altera_reserved_<jtag pin> is assigned to pin location
Description You may see "Error (176310): Can't place multiple pins assigned to pin location <pin_location>" with the information code as titled when you assigned I/O pins and named the pins as "TMS", "TCK", "TDO" or "TDI". Resolution Avoid naming I/O pins as "TMS", "TCK", "TDO" or "TDI". These names are reserved for JTAG and you cannot use them on I/O pins.Why is there a mismatch in the version of Qsys TCL package when exporting system as Qsys script(.tcl)?
Description You may see the TCL version 16.0 needed in the script when you export it in the Quartus® Prime Software Standard Edition version 16.1 and later. This is the line from the Tcl script: package require -exact qsys 16.0 This is the correct behaviour and the version does not need to match.Why do I get the critical warning when I assigned GPIOs on I/O Bank 2 on MAX® 10 with the analog-to-digital converter (ADC) project?
Description You will get the critical warning message "Critical Warning(16248) Pin XYZ is placed too close with ADC pins" when you assign GPIO pins to I/O Bank 1A, 1B, 2, and 8 with an analog-to-digital converter (ADC) block being used in MAX® 10 E144 package device. Resolution Please refer to Table 19 from the MAX® 10 General Purpose I/O User Guide: Please refer above table to assign the GPIO pins to the correct I/O banks.Why does the Intel® FPGA Download Cable II driver installation fail on Windows* operating system?
Description Due to the expiration of the digital signature certificate of the Intel® FPGA Download Cable II driver for Windows* operating system, the installation process of the driver may fail. Follow the next steps to verify if the digital signature certificate of your driver has expired: Go to '<Quartus Installation Path>\qprogrammer\quartus\drivers\usb-blaster-ii' folder Right click on 'usbblasterii.cat' and select 'Properties', then select the 'Digital Signatures' tab Select the 'IFDLII Production Key1' signature from the 'Signature List' and click 'Details' Click on 'View Certificate' If the driver has expired, you will see the 'This certificate has expired or is not yet valid' message Resolution To work around this problem, follow the next steps: Download an updated version of the driver from the following link Decompress the downloaded file and substitute 'usb-blaster-ii.inf' and 'usb-blaster-ii.cat' files in '<Quartus Installation Path>\qprogrammer\quartus\drivers\usb-blaster-ii' folder Launch the Windows* 'Device Manager' Locate 'Altera USB-Blaster II (JTAG interface)' node under 'JTAG cables' in the Windows* 'Device Manager', right click and select 'Update Driver' Choose ´'Browse my computer for driver software' then click on 'Search for drivers in this location' and point to the new 'usb-blaster-ii.inf' file This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 21.1.
