Knowledge Base Article

Warning (169177): <number> pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing MAX 10 Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems

Description

You may see the above warning when you assign 3.3/3.0/2.5-V LVTTL/LVCMOS I/O standards to input pins in Intel® MAX® 10 devices.

This auto-generated message in the Intel Quartus® Prime Edition Software cannot be removed.

Resolution

Ignore the warning.

Updated 3 months ago
Version 2.0
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