What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.2?
Description The latest device firmware for Quartus® Prime Pro Edition Software version 24.2 is available for download below. Fixes for the following problems are included in the latest release (The newest release contains all prior fixes and supersedes earlier device firmware releases). Change Log Firmware version 0.04fw: This patch fixes the issue of incorrect data retrieval in the GET_I2C_TELEMETRY command. Firmware version 0.10fw: This patch fixes to reissue PLL lock request to achieve true independent PERST. Firmware version 0.54fw: This patch fixes issue where the HPS will get stuck at FSBL on certain units above Quartus 22.2B94 / or with firmware above 22.4B94. Firmware version 0.59fw: This patch includes fix to improves voltage sensor reading stability. Please also see the following links: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution Download the latest device firmware below. Note: Patches must be applied to the Quartus® Prime Pro Edition Software and the Quartus® Prime Pro Edition Software Programmer and Tools. Recompilation is not required. All programming files should be recreated. Re-run programming file generation or conversion using the Quartus® Prime Software programming file generator.What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3?
Description The latest device firmware for Quartus® Prime Pro Edition Software version 24.3 is available for download below. Fixes for the following problems are included in the latest release (The newest release contains all prior fixes and supersedes earlier device firmware releases). Change Log Firmware version 0.12fw: This patch fixes potential HBM2E calibration issues for Agilex® 7 FPGA M-Series devices. Firmware version 0.22fw: This patch fixes a rare scenario issue where the device hangs when reconfiguring back-to-back. The fix includes an update to the polling scheme in firmware to address the issue. Firmware version 0.25fw: This patch fixes an issue on Agilex® 7 FPGA devices where the HPS may become stuck at the First Stage Bootloader (FSBL). Firmware version 0.27fw: This patch fixes an issue where mailbox temperature inquiry would result in incorrect reading. It also fixes an issue where QSPI Write/Read would result in HW Ready error, an racing condition. Firmware version 0.34fw: This patch fixes a race condition in handling SHA isr and resumption of FPGA data blocks. Drain DMA post a configuration/PR to flush out left over data if any. Please also see the following links: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution Download the latest device firmware below. Note: Patches must be applied to the Quartus® Prime Pro Edition Software and the Quartus® Prime Pro Edition Software Programmer and Tools. Recompilation is not required. All programming files should be recreated. Re-run the programming file generation or conversion using the Quartus® Prime Software programming file generator.Is the timing model for Stratix® 10 1SX040, 1ST040, and 1SG040 FPGA devices correct?
Description No, due to a problem in the Quartus® Prime Pro Edition Software v21.2 and earlier, the timing model for Stratix® 10 1SX040, 1ST040 and 1SG040 FPGA devices is not correct. This occurs because the timing model for vertical (C2/C3/C4/C16) routing wires are miscalculated. Errors range from few ps to 50 ps per path, with 150 ps in the worst corner for the worst wire. This problem only affects Stratix® 10 1SX040 (GX/SX H-Tile) / 1SG040 (TX E-Tile) FPGA devices. Resolution To work around this problem for projects using devices 1ST040xxxx (TX E-Tile), download and install the patch according to the versions of your Quartus® Prime Software. Patch 0.60 for Quartus Prime Pro Edition Software v20.1: Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 for Windows (.exe) Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 (.txt) Patch 0.57 for Intel Quartus Prime Pro Edition Software v20.2: Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 for Windows (.exe) Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 (.txt) Patch 0.74 for Intel Quartus Prime Pro Edition Software v20.3: Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 for Windows (.exe) Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 (.txt) Patch 0.43 for Intel Quartus Prime Pro Edition Software v20.4: Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 for Windows (.exe) Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 (.txt) To work around this problem for projects using devices 1ST040xxxx (TX E-Tile) or 1SX040xxx (GX/SX H-Tile), download and install the patch according to the versions of your Intel® Quartus® Prime Software. Patch 0.50 for Intel Quartus Prime Pro Edition Software v21.1: Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 for Windows (.exe) Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 for Linux (.run) Readme for Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 (.txt) Patch 0.30 for Intel Quartus Prime Pro Edition Software v21.2: Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 for Windows (.exe) Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 (.txt) Once the patch is installed, perform the following actions: Save <design>.sta.rpt before running. Run quartus_sta –force_dat <project> in the command line. Recompile the design if there are any negative slacks. This problem only affects the timing model for the devices listed. The other Stratix® 10 FPGA devices are not affected. This problem is fixed beginning with version 21.3 of the Quartus® Prime Pro Edition Software.Why does my Stratix® 10 FPGA device fail to configure if there is a delay between power up and configuration?
Description Due to a problem in the Stratix® 10 FPGA devices listed below, if it takes longer than 18 seconds from the completion of power up to the configuration of the first 256 Kb of configuration bitstream your Stratix® 10 FPGA device may fail to configure. The root cause lies in the Boot ROM, which causes a watchdog timer to overflow and causes the device to hang. This issue applies to all configuration schemes. Configuration via Protocol (CvP) is not impacted if the programming of the periphery meets the 18 seconds requirement as described in the workaround. This issue does not apply to reconfiguration. If you are using the FPGA Download Cable II and you encounter this issue, you will see the following error message: Error (20068): Configuration error, you must power-cycle the device to recover from this condition. To avoid this error, you must ensure that the device is configured within 18 seconds after completion of the power-on sequence. This issue affects the following Stratix 10 FPGA devices: Impacted Stratix 10 GX FPGA variants Stratix 10 GX 1100 H-Tile ES1 Stratix 10 GX 2800 H-Tile ES2 Stratix 10 GX 2800 H-Tile ES3 Stratix 10 GX 2800 L-Tile ES3 Stratix 10 GX 2500 L-Tile Production Stratix 10 GX 2800 L-Tile Production Impacted Stratix 10 SX FPGA variants Stratix 10 SX 1100 H-Tile ES1 Stratix 10 SX 2800 L-Tile ES1 Stratix 10 SX 2800 L-Tile ES2 Stratix 10 SX 2800 L-Tile ES3 Stratix 10 SX 2800 H-Tile ES3 Impacted Stratix 10 MX FPGA variants Stratix 10 MX 2100 H-Tile ES1 Impacted Stratix 10 TX FPGA variants Stratix 10 TX 2800 ES1 Stratix 10 TX 2100 ES1 Resolution The recommended conditions for configuration are shown in Figure 4 of the Stratix® 10 Configuration User Guide. After successful configuration the nSTATUS pin is driven high within 110 ms of nCONFIG pin transitioning to high. The observed behavior with impacted devices shows that the nSTATUS pin remains low until the device is power cycled. There are both hardware and software workarounds possible for this issue, which are described in the errata document. The hardware and software workarounds are common to all impacted Stratix® 10 device variants. To implement the software workaround, you are required to download and install patch 0.13 along with Quartus® Prime Pro Edition version 18.0 from the below links. This problem is due to be fixed in the production version of the Stratix 10 SX 2800/2500 L-Tile FPGA device. If you are using an Stratix 10 GX 2800/2500 L-Tile FPGA device and a fix is required, move to the Stratix 10 SX 2800/2500 L-Tile FPGA device, which is drop-in compatible.Why does the Altera® FPGA Temperature Sensor IP core readout always return 0 when using Quartus® Prime Pro Edition software version 20.1?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 20.1, you may see the Intel® FPGA Temperature Sensor IP core always return code 0 when reading the junction temperature on Arria® 10 FPGA or Cyclone® 10 GX FPGA devices. Resolution To work around this problem, a patch is available for the Quartus® Prime Pro Edition Software version 20.1. Download and install Patch 0.18 for 20.1 below. This problem is fixed starting with the Quartus® Prime Pro Edition Software version 20.2.Why is the F-tile unresponsive for the Agilex® 7 FPGA device with Density Code 008 or 006 and Package Code R16A or R24C?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.2 and earlier, one of the F-Tiles (IO Bank 13A) is not correctly configured for the following devices: AGF 006 R16A AGF 006 R24C AGF 008 R16A AGF 008 R24C Resolution A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 23.1 and version 23.2. Download and install patch 0.28fw for the Quartus® Prime Pro Edition Software version 23.1 below, then re-generate your programming file. Download and install patch 0.05fw for the Quartus® Prime Pro Edition Software version 23.2 below, then re-generate your programming file. This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.Why does HPS EMAC MDIO not work when routed to FPGA IO on Agilex™ 5 FPGA designs?
Description Due to a problem in the Quartus™ Prime Pro Edition Software version 24.1, when routed to FPGA IO, the HPS EMAC MDIO does not work as expected for designs targeting Agilex™ 5 device. You will be able to route MDIO to FPGA IO in Platform Designer and generate the design without errors, but the actual input and output will always be 0. Resolution A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 24.1. Download and install Patch 0.19 from the following links: Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 for Windows (.exe) Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 for Linux (.run) Readme for Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 (.txt) This problem has been fixed in a future release of the Quartus™ Prime Pro Edition software version 24.2 and later versions..Why does my design fail in hardware when using the Intel® Quartus® Prime Pro Edition Software version 22.1?
Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.1, you may see failures in hardware when the warning message below is displayed during the 'Analysis & Synthesis' stage. Affected designs will have a mismatch between RTL and synthesized netlist. The designs impacted by the synthesis problem will see the following warning in the synthesis report file (*.syn.rpt). Warning (13228): Verilog HDL or VHDL warning at <file>: defparam under generate scope cannot change parameter values outside of its hierarchy File: <file> Resolution A patch is available to work around this problem for the Intel® Quartus® Prime Pro Edition Software version 22.1. Download and install patch 0.05 from the appropriate link below. Download patch Intel® Quartus® Prime Pro Edition 22.1 Patch 0.05 for Windows (.exe) Download patch Intel® Quartus® Prime Pro Edition 22.1 Patch 0.05 for Linux (.run) Download the Readme for Intel® Quartus® Prime Pro Edition 22.1 Patch 0.05 (.txt) This problem is fixed in all future releases of the Intel® Quartus® Prime Pro Edition Software starting from 22.1.Why do I see an occasional system hang during reconfiguration of Intel® Stratix® 10 devices using the Intel® Quartus® Prime Pro Edition Software versions 18.1.1 - 19.3?
Description Due to a problem in the SDM Firmware in the Intel® Quartus® Prime Pro Edition Software versions 18.1.1 - 19.3, a system hang may occur during the reconfiguration flow of the Intel® Stratix® 10 device. Resolution This problem is resolved in the Intel® Quartus® Prime Pro Edition Software version 20.1. A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 19.3. Download and install the patch from the appropriate link below: Download patch for Windows quartus-19.3-0.77fw-windows.exe Download patch for Linux quartus-19.3-0.77fw-linux.run Download the Readme for patch quartus-19.3-0.77fw-readme.txtWhy are the HPS GMII to RGMII Adapter FPGA IP outputs always stuck to 0 on Agilex™ 5 designs?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.1, the HPS GMII to RGMII Adapter FPGA IP is not functioning for designs targeting Agilex™ 5. You may observe HPS GMII to RGMII Adapter FPGA IP outputs are always stuck to 0 and/or PHY is not receiving any packet from FPGA IO. This problem occurs when HPS XGMAC is routed to FPGA IO using the HPS GMII to RGMII Adapter FPGA IP. Resolution A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 24.1. Download and install Patch 0.19 from the following links: Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 for Windows (.exe) Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 for Linux (.run) Readme for Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 (.txt) The patches will enable HPS GMII to RGMII Adapter FPGA IP to perform basic network transmission at 10Mbps/100Mbps link rate. 1Gbps speed is not supported in this patch. Additionally, for Linux OS, you must modify the Linux Device Tree description in <linux-socfpga folder>/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts> to specify mac-mode as “gmii” for the EMAC instance being used with the FPGA IO pins. In the example below, the HPS gmac1 is selected for routing to FPGA IO: &gmac1 { status = "okay"; phy-mode = "rgmii-id"; mac-mode = "gmii"; phy-handle = <&emac1_phy0>; max-frame-size = <9000>; mdio0 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; emac1_phy0: ethernet-phy@0 { reg = <0>; }; }; }; This problem is scheduled to be fix in a future release of the Quartus® Prime Pro Edition Software. Additional Information Embedded Peripherals IP User Guide Updated for Quartus® Prime Design Suite: 24.1 Publication Content ID: 683130 Chapter: HPS GMII to RGMII Adapter Intel FPGA IP