What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3.1?
Description The latest device firmware for the Quartus® Prime Pro Edition Software version 24.3.1 can be downloaded from the following links. Fixes for the following problems are included in the latest release (The newest release contains all prior fixes and supersedes earlier device firmware releases). Change Log Firmware version 1.01fw: This patch fixes an issue on Agilex® 7 FPGA devices where the HPS may become stuck at the First Stage Bootloader (FSBL). Firmware version 1.06fw: This patch includes EMIF and HBM2e firmware updates for Agilex® 7 M-Series ES and production devices. Firmware version 1.15fw: This patch fixes an issue where SDM hangs when reconfiguring back-to-back. Please also see the following links: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution Download the latest device firmware below. Note: Patches must be applied to the Quartus® Prime Pro Edition Software and the Quartus® Prime Pro Edition Software Programmer and Tools. Recompilation is not required. All programming files should be recreated. Re-run the programming file generation or conversion using the Quartus® Prime Software programming file generator.Why does the Stratix® 10 EMIF Toolkit report DQS Enable Calibration failure?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 19.3 and earlier, the Intel Stratix® EMIF Toolkit calibration report may show a DQS Enable Calibration failure even though both the DQ/DQS read and write margins show passing valid window values. This DQS Enable Calibration failure report can be ignored if the DQ/DQS read and write margins show passing valid window values. Resolution To work around this problem in the Quartus® Prime Pro Edition Software version 19.3 and earlier, you can also verify that the local_cal_success signal is asserted using the Signal Tap Logic Analyzer tool. This problem is fixed in the Quartus Prime Pro Edition Software version 19.4 and later.Why do several IP design examples fail on the Agilex® 7 FPGA Series Transceiver SoC Development Kit?
Description The following IP Cores generate example designs for the Agilex® 7 FPGA Series Transceiver SoC Development Kit with incorrect VID settings. 1) Serial Lite IV IP 2) Interlaken (2nd Generation) IP 3) Triple-Speed Ethernet IP 4) E-Tile Dynamic Reconfiguration IP 5) E-Tile Hard IP for Ethernet and CPRI PHY IP 6) JESD204B IP 7) JESD204C IP 8) Ethernet Subsystem IP Resolution The correct VID settings can be found in section 6.1, Add SmartVID settings in the Quartus® Prime QSF file of the Agilex® F-Series Transceiver-SoC Development Kit User Guide. Update the design examples with the correct VID settings as shown below: set_global_assignment -name PWRMGT_BUS_SPEED_MODE "100 KHZ" set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 42 set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 00 set_global_assignment -name USE_PWRMGT_SCL SDM_IO0 set_global_assignment -name USE_PWRMGT_SDA SDM_IO12 set_global_assignment -name USE_CONF_DONE SDM_IO16 set_global_assignment -name VID_OPERATION_MODE "PMBUS MASTER" set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "LINEAR FORMAT" set_global_assignment -name PWRMGT_LINEAR_FORMAT_N "-13" set_global_assignment -name PWRMGT_TRANSLATED_VOLTAGE_VALUE_UNIT VOLTS This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.Why are the inputs and/or outputs from my Agilex® 7 FPGA device inverted?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.4 and later, signals from the banks listed below may be inverted. This only affects IO Cells where any of the IO registers are enabled. Device GPIO Bank AGIB041, AGID041 3C and 3D AGFB006, AGFB008 3C and 3D AGFB012, AGFB014 3C and 3D AGFB019, AGFB023, AGFD019, AGFD023 AGIB019, AGIB023, AGID019, AGID023 3A and 3B AGFB022, AGFB027 AGIB022, AGIB027 3C and 3D Resolution To work around this problem, disable register packing for these GPIO banks. This problem has been fixed starting with Quartus® Prime Pro Edition software version 25.1.1.What is the latest device firmware for the Agilex® FPGA and Stratix®10 FPGAs?
Description Altera® recommends using the latest version of the Quartus® Prime Pro Edition Software and the latest available device firmware. Please also see the following user guides: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution The latest device firmware available for the Quartus® Prime Pro Edition Software can be downloaded from the following links: Quartus Prime Pro Edition Software version 25.3 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 25.3? Quartus Prime Pro Edition Software version 25.1 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 25.1? Quartus Prime Pro Edition Software version 24.3.1 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3.1? Quartus Prime Pro Edition Software version 24.3 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3? Quartus Prime Pro Edition Software version 24.2 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.2? Quartus Prime Pro Edition Software version 24.1 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.1? Quartus Prime Pro Edition Software version 23.4 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.4? Quartus Prime Pro Edition Software version 23.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.3? Quartus Prime Pro Edition Software version 23.2 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.2? Quartus Prime Pro Edition Software version 23.1 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.1? Quartus Prime Pro Edition Software version 22.4 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.4? Quartus Prime Pro Edition Software version 22.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.3? Quartus Prime Pro Edition Software version 22.2 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.2? Quartus Prime Pro Edition Software version 22.1 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.1? Quartus Prime Pro Edition Software version 21.4 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.4? Quartus Prime Pro Edition Software version 21.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.3? Quartus Prime Pro Edition Software version 21.2 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.2? Quartus Prime Pro Edition Software version 21.1 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.1? Quartus Prime Pro Edition Software version 20.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 20.3?What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.2?
Description The latest device firmware for Quartus® Prime Pro Edition Software version 24.2 is available for download below. Fixes for the following problems are included in the latest release (The newest release contains all prior fixes and supersedes earlier device firmware releases). Change Log Firmware version 0.04fw: This patch fixes the issue of incorrect data retrieval in the GET_I2C_TELEMETRY command. Firmware version 0.10fw: This patch fixes to reissue PLL lock request to achieve true independent PERST. Firmware version 0.54fw: This patch fixes issue where the HPS will get stuck at FSBL on certain units above Quartus 22.2B94 / or with firmware above 22.4B94. Firmware version 0.59fw: This patch includes fix to improves voltage sensor reading stability. Please also see the following links: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution Download the latest device firmware below. Note: Patches must be applied to the Quartus® Prime Pro Edition Software and the Quartus® Prime Pro Edition Software Programmer and Tools. Recompilation is not required. All programming files should be recreated. Re-run programming file generation or conversion using the Quartus® Prime Software programming file generator.What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3?
Description The latest device firmware for Quartus® Prime Pro Edition Software version 24.3 is available for download below. Fixes for the following problems are included in the latest release (The newest release contains all prior fixes and supersedes earlier device firmware releases). Change Log Firmware version 0.12fw: This patch fixes potential HBM2E calibration issues for Agilex® 7 FPGA M-Series devices. Firmware version 0.22fw: This patch fixes a rare scenario issue where the device hangs when reconfiguring back-to-back. The fix includes an update to the polling scheme in firmware to address the issue. Firmware version 0.25fw: This patch fixes an issue on Agilex® 7 FPGA devices where the HPS may become stuck at the First Stage Bootloader (FSBL). Firmware version 0.27fw: This patch fixes an issue where mailbox temperature inquiry would result in incorrect reading. It also fixes an issue where QSPI Write/Read would result in HW Ready error, an racing condition. Firmware version 0.34fw: This patch fixes a race condition in handling SHA isr and resumption of FPGA data blocks. Drain DMA post a configuration/PR to flush out left over data if any. Please also see the following links: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution Download the latest device firmware below. Note: Patches must be applied to the Quartus® Prime Pro Edition Software and the Quartus® Prime Pro Edition Software Programmer and Tools. Recompilation is not required. All programming files should be recreated. Re-run the programming file generation or conversion using the Quartus® Prime Software programming file generator.Is the timing model for Stratix® 10 1SX040, 1ST040, and 1SG040 FPGA devices correct?
Description No, due to a problem in the Quartus® Prime Pro Edition Software v21.2 and earlier, the timing model for Stratix® 10 1SX040, 1ST040 and 1SG040 FPGA devices is not correct. This occurs because the timing model for vertical (C2/C3/C4/C16) routing wires are miscalculated. Errors range from few ps to 50 ps per path, with 150 ps in the worst corner for the worst wire. This problem only affects Stratix® 10 1SX040 (GX/SX H-Tile) / 1SG040 (TX E-Tile) FPGA devices. Resolution To work around this problem for projects using devices 1ST040xxxx (TX E-Tile), download and install the patch according to the versions of your Quartus® Prime Software. Patch 0.60 for Quartus Prime Pro Edition Software v20.1: Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 for Windows (.exe) Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 (.txt) Patch 0.57 for Intel Quartus Prime Pro Edition Software v20.2: Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 for Windows (.exe) Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 (.txt) Patch 0.74 for Intel Quartus Prime Pro Edition Software v20.3: Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 for Windows (.exe) Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 (.txt) Patch 0.43 for Intel Quartus Prime Pro Edition Software v20.4: Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 for Windows (.exe) Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 (.txt) To work around this problem for projects using devices 1ST040xxxx (TX E-Tile) or 1SX040xxx (GX/SX H-Tile), download and install the patch according to the versions of your Intel® Quartus® Prime Software. Patch 0.50 for Intel Quartus Prime Pro Edition Software v21.1: Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 for Windows (.exe) Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 for Linux (.run) Readme for Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 (.txt) Patch 0.30 for Intel Quartus Prime Pro Edition Software v21.2: Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 for Windows (.exe) Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 (.txt) Once the patch is installed, perform the following actions: Save <design>.sta.rpt before running. Run quartus_sta –force_dat <project> in the command line. Recompile the design if there are any negative slacks. This problem only affects the timing model for the devices listed. The other Stratix® 10 FPGA devices are not affected. This problem is fixed beginning with version 21.3 of the Quartus® Prime Pro Edition Software.Why does my Stratix® 10 FPGA device fail to configure if there is a delay between power up and configuration?
Description Due to a problem in the Stratix® 10 FPGA devices listed below, if it takes longer than 18 seconds from the completion of power up to the configuration of the first 256 Kb of configuration bitstream your Stratix® 10 FPGA device may fail to configure. The root cause lies in the Boot ROM, which causes a watchdog timer to overflow and causes the device to hang. This issue applies to all configuration schemes. Configuration via Protocol (CvP) is not impacted if the programming of the periphery meets the 18 seconds requirement as described in the workaround. This issue does not apply to reconfiguration. If you are using the FPGA Download Cable II and you encounter this issue, you will see the following error message: Error (20068): Configuration error, you must power-cycle the device to recover from this condition. To avoid this error, you must ensure that the device is configured within 18 seconds after completion of the power-on sequence. This issue affects the following Stratix 10 FPGA devices: Impacted Stratix 10 GX FPGA variants Stratix 10 GX 1100 H-Tile ES1 Stratix 10 GX 2800 H-Tile ES2 Stratix 10 GX 2800 H-Tile ES3 Stratix 10 GX 2800 L-Tile ES3 Stratix 10 GX 2500 L-Tile Production Stratix 10 GX 2800 L-Tile Production Impacted Stratix 10 SX FPGA variants Stratix 10 SX 1100 H-Tile ES1 Stratix 10 SX 2800 L-Tile ES1 Stratix 10 SX 2800 L-Tile ES2 Stratix 10 SX 2800 L-Tile ES3 Stratix 10 SX 2800 H-Tile ES3 Impacted Stratix 10 MX FPGA variants Stratix 10 MX 2100 H-Tile ES1 Impacted Stratix 10 TX FPGA variants Stratix 10 TX 2800 ES1 Stratix 10 TX 2100 ES1 Resolution The recommended conditions for configuration are shown in Figure 4 of the Stratix® 10 Configuration User Guide. After successful configuration the nSTATUS pin is driven high within 110 ms of nCONFIG pin transitioning to high. The observed behavior with impacted devices shows that the nSTATUS pin remains low until the device is power cycled. There are both hardware and software workarounds possible for this issue, which are described in the errata document. The hardware and software workarounds are common to all impacted Stratix® 10 device variants. To implement the software workaround, you are required to download and install patch 0.13 along with Quartus® Prime Pro Edition version 18.0 from the below links. This problem is due to be fixed in the production version of the Stratix 10 SX 2800/2500 L-Tile FPGA device. If you are using an Stratix 10 GX 2800/2500 L-Tile FPGA device and a fix is required, move to the Stratix 10 SX 2800/2500 L-Tile FPGA device, which is drop-in compatible.Why does the Altera® FPGA Temperature Sensor IP core readout always return 0 when using Quartus® Prime Pro Edition software version 20.1?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 20.1, you may see the Intel® FPGA Temperature Sensor IP core always return code 0 when reading the junction temperature on Arria® 10 FPGA or Cyclone® 10 GX FPGA devices. Resolution To work around this problem, a patch is available for the Quartus® Prime Pro Edition Software version 20.1. Download and install Patch 0.18 for 20.1 below. This problem is fixed starting with the Quartus® Prime Pro Edition Software version 20.2.