Triple speed Ethernet (TSE) MAC Configuration in 10/100 for Arria 10 device FPGA.
Hi , Am Working on ARRIA 10 device FPGA (10AX016E3F27I2SG) . Using Quartus Standard edition version 21.1 for FPGA Design and NIOS II SDK for Software development. I have few Queries regarding the FPGA and its drivers. 1. we have Configured NIOS Processor for Triple Speed Ethernet MAC in Quartus tool , and exported to NIOS II tool. Ethernet Address and Board support Packages (BSP) got generated but , am unable to find the sequence of the TSE driver. I have attached the BSP (Source and Header )Files generated for TSE. I need the sequence for TSE driver. a. How to do Reset for MAC ? b. Need functions or routines for TSE Transmit and Receive Frames . c. Initialization process of TSE MAC ? d. How to Set the speed for TSE MAC ? e. Process to Enable and Disable the Interrupts of TSE MAC. 2. I need Register set with Bit description and Offset Addresses for TSE MAC Initialization . 3. TCP IP stack and how to attach the driver to main function and process to send TCP and UDP Packets. 4. I need the example code for TSE MAC configuration of 10/100. 5. We are using Microchip PHY (KSZ8081RNDCA-TR) in our custom board. I need sequence process to access the PHY .
Controller IP for DE10-Lite SDRAM
I'm having trouble to initialize the external SDRAM on the DE10-lite board. I tried to use the SDRAM Controller Intel FPGA IP which was available for free in qsys until Quartus 20. Now it seems not to be free anymore and I have trouble using it anyway. My question is: what would be the *free* way to use the SDRAM without having to write a whole controller on my own when one wants to use the latest Quartus lite version? I searched for "SDRAM" in the IP components and found that: It doesn't look like it contains a compatible tool for me or I don't understand them. Is there any guideline on how to use either one of these tools or the "old" SDRAM Controller in combination with the sdram that is attached to the de10-lite board? Thanks Tim
Couldn't access HLS in Quartus 19.1 Standard Edition
Couldn't access HLS in Quartus 19.1 Standard Edition I have done the steps: On Windows systems, initialize your environment as follows: Start a Visual Studio x64 Win64 Command Prompt session. For example, C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\bin\amd64\vcvars64.bat. In your x64 Win64 Command Prompt session, change directories to the hls directory in your Intel® Quartus® Prime installation directory. For example, C:\intelFPGA_standard\19.1\hls Run the following command from the hls directory to set the environment variables for the i++ command in the current terminal session: init_hls.bat The command prints out the modified environment variable settings. The environment initialization script shows the environment variables that it set, and you can now run the i++ command from this command prompt session. But I am not able to access HLS , please help me in this regard. Attatchment: The screenshot of the command prompt is attached.
Can't get Quartus Prime Pro Academic License
Everything I do keeps taking me back to the University Program membership form. I'm already accepted and signed in. This is across browsers and devices. No matter what I do, requesting Prime Pro takes me to membership form, trying to open a support request opens the same membership form, trying to get an FPGA Evaluation IP takes me to the same form. I tried resubmitting another redundant form and did get accepted again and the behavior did not change. I cannot do anything without Quartus Prime Pro license as an Academic with an Agilex card.Terasic De10-Nano tutorial source code down
Hi all, I'm going through the getting started guide for the terasic de10-nano, and none of the source code links works. Does anybody have the code (specifically for the On-board Accelerometer project) on their local that they're willing to share, please? Or if you know a similar project that also shows how to set a web server on the FPGA (like Express.js in the tutorial), I'd really appreciate it. Thank you.
