Knowledge Base Article
Why True Differential input buffer with on-chip differential Termination (RD OCT) enabled does not respond after device is configured for Agilex™ 3 FPGA, Agilex™ 5 FPGA, and Agilex™ 7 FPGA devices?
Description
The on-chip differential termination (RD OCT) for the True Differential input buffer is not enabled correctly in Quartus® Prime software. This issue impacts all True Differential Signaling (TDS) input buffer with RD OCT enabled, except when such input standard is used as the EMIF interface reference clock.
Resolution
This issue will be fixed progressively according to devices in the Quartus® Prime software. Refer to the tables below for the fix plan per device and Quartus® Prime version.
|
Part Number |
Quartus® Prime v25.1 |
Quartus® Prime v25.1.1 |
Quartus® Prime v25.3 |
|
AGMxxxxxxxxxxVR0 |
Not Fixed |
Not Fixed |
Fixed |
|
AGMxxxxxxxxxxxVC |
Not Fixed |
Fixed |
Fixed |
|
A5Ex013xxxxxxxSR0 |
Not Fixed |
Not Fixed |
Fixed |
|
A5Ex013xxxxxxxS/V/XCS/R1 |
Not Fixed |
Fixed |
Fixed |
|
A5Ex065xxxxxxxSR0 |
Not Fixed |
Not Fixed |
Fixed |
|
A5Ex065xxxxxxxS/V/E/X |
Not Fixed |
Not Fixed |
Fixed |
|
A3CxxxxxxxxxxxS |
Not Fixed |
Fixed |
Fixed |
Alternatively, you may use the below .tcl script to fix the differential termination settings in your .sof file manually.
Please contact Altera Support team for assistance.