Knowledge Base Article

Why do I observe UVM RAL error when simulating the JESD204B or JESD204C Intel® FPGA IP with VCS* MX software version Q-2020.03-SP2?

Description

Due to a compatibility problem, you may observe UVM RAL error when simulating the JESD204B or JESD204C Intel® FPGA IP from the Intel® Quartus® Prime Pro Edition Software version 21.1 with VCS* MX software version Q-2020.03-SP2.

Resolution

This problem has been fixed in Intel® Quartus® Prime Pro Edition Software version 21.3.

Updated 3 months ago
Version 3.0
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