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alhussain779's avatar
alhussain779
Icon for New Contributor rankNew Contributor
2 years ago

Power Monitor is not working on Stratix 10

Hello,

I am trying to measure the power consumption of a design in my FPGA device using the Power Monitor utility that came with Board Test System. However, when I open it I get the following message:

""

Please check with the following methods:
-Ensure your computer is connected to the right board with USB cable.
-Type "jtagconfig --debug" in NIOS command shell, ensure both system MAX and FPGA are on JTAG chain.
-Restart this application.

""

And when I checked the log file of the bts program I found the following:

""

May 09, 2023 3:14:31 PM com.intel.bts.BtsView <init>
INFO: Board version: Rev D, chip version: HTPRD
May 09, 2023 3:14:31 PM com.intel.bts.ClientApp attachServer
INFO: [C:\intelFPGA_pro\19.1\quartus/sopc_builder/bin/system-console, --server]
May 09, 2023 3:14:31 PM com.intel.bts.ClientApp attachServer
INFO: Here is the standard output of the command:
May 09, 2023 3:14:37 PM com.intel.bts.ClientApp attachServer
INFO: TCP PORT: 59379
May 09, 2023 3:14:44 PM com.intel.bts.JtagInfo createDeviceInfoMapArray
INFO: 1 device detected: /devices/1SX280HH1(.|S3)|1SX280HH2|..@1#USB-1#DE10-Pro
May 09, 2023 3:14:44 PM com.intel.bts.ClientApp getMatchedBoardInfoArray
INFO: System Max matched: false, Fpga matched: true
May 09, 2023 3:15:13 PM com.intel.bts.BtsViewController buttonCloseOnAction
CONFIG: [Event -- Main window closing]

""

Note that the board I am using is from Terasic DE10-PRO SX

How can I solve the problem?

16 Replies

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  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi Alhussain,


    Thank you for your verification on the status with the latest version of Quartus.

    I really regret that the issue is still there.


    One thing you can check is the default setup for the board. Have you check the JTAG switch in the board where the switch is to enable MAX V in the JTAG chain?


    Regards,

    Aqid


    • alhussain779's avatar
      alhussain779
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hi Aqid,

      Yes, it's enabled.

      I have also tried every possible JTAG switch configuration, no luck.

      Regards,

      Alhussain

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Snapshot from Intel® Stratix® 10 SX SoC Development Kit User Guide

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Snapshot from Terasic DE10-Pro SX User Manual

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi Alhussain,


    I think this might be very likely with the Terasic board that you are using. I am not 100% confident on this but there might some differences between the board and our Intel Stratix 10 development kit.


    When looking to Terasic DE10-Pro SX User Manual, I observed that the power monitor circuit is connected to S10 and not MAX 10 as our Intel® Stratix® 10 SX SoC Development Kit.


    Refer to the attached snapshot from both documentations. We suspected Terasic have their own application written to read power monitor.


    Regards,

    Aqid