Where is cv_bsp_generator.py

I'm using the version called out in my original link, which is the tutorial that all things seem to point to for SPL builds. The script is not included in that version. It is included in the version you linked. There seems to be a disconnect between that tutorial and the repo version.

It would also be nice if the scripts could be ported to python 3 (it's only been out for 15 years), or at least add details to the guide on the easiest way to run them, because simply installing python and running the scripts causes them to crash in several locations: ex, print parenthesis, unicode not defined, str =/= bytes.

I cannot get the SPL u-boot build to complete. This is the error message:

arch/arm/mach-socfpga/wrap_sdram_config.c:236:2: error: #error LPDDR2 and other DRAM types are not yet supported

Well LPDDR2 is the memory type I am dealing with for my board, and that seems to be a valid selection in the Quartus HPS configuration menu:

<parameter name="HPS_PROTOCOL" value="LPDDR2" />

and that is how the part is advertised on Intel's product webpage:

"Multiport SDRAM controller with support for DDR2, DDR3, DDR3L, and LPDDR2"

So how do I get around this issue?

Which files do you need? I am unable to give you the entire project. I was using Quartus Prime 17.0.

My general steps are:

1) Build Quartus project

2) Run bsp-editor to get the generated folder

3) git clone https://github.com/altera-opensource/u-boot-socfpga

4) run cv_bsp_generator.py

5) make socfpga_arria5_defconfig

6) make -j 48

and this is where I'm seeing the failure.

I have attached the hps_isw_handoff directory.

This is Arria 5

I'm glad it's not just me! Thank you very much for investigating, I'm interested in seeing the fix.

Then where can I find the steps for older builds?