Forum Discussion
New ContributorSD Card Boot
Occasional ContributorHello Brian,
I am in charge of updating the build instructions related to Agilex 5 and we want to improve these as much as we can. Could you please provide more details of the configuration that you needed to do to boot successfully?
Were you using the instructions provided in https://altera-fpga.github.io/rel-25.1.1/embedded-designs/agilex-5/e-series/premium/boot-examples/ug-linux-boot-agx5e-premium/ to build your SPL for the modular dev-kit?
You mentioned that you needed to change socfpga_cyclone5_defconfig, may I know why you started with this defconfing instead of the one specific for Agilex 5 ( socfpga_agilex5_defconfig )?
Thanks in advance
Rolando
malcolm_lockeHi Rolando, I am pleased to hear that you are updating the build instructions for Agilex 5! I have been trying to follow the instructions in this link
for the Boot from QSPI but have given up as, having got around a number of errors, I managed to create and program my QSPI, only for to fail to boot (I can't even open the Serial Port), at which point I have no way to debug what is happening...
One error that I have relates to bl31.bin which i built successfully in the Boot from SD Card stage, but when I run bitbake in the QSPI stage, i get this error:
DEBUG: Executing shell function do_compile cp: cannot stat '/home/malc/agilex5_top/yocto/build/tmp/deploy/images/agilex5_dk_a5e065bb32aes1/bl31.bin': No such file or directory WARNING: /home/malc/agilex5_top/yocto/build/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/u-boot-socfpga/v2025.04+git/temp/run.do_compile.19724:163 exit 1 from 'cp /home/malc/agilex5_top/yocto/build/tmp/deploy/images/agilex5_dk_a5e065bb32aes1/${file} /home/malc/agilex5_top/yocto/build/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/u-boot-socfpga/v2025.04+git/build/${config}/${file}' WARNING: Backtrace (BB generated script): #1: do_compile, /home/malc/agilex5_top/yocto/build/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/u-boot-socfpga/v2025.04+git/temp/run.do_compile.19724, line 163 #2: main, /home/malc/agilex5_top/yocto/build/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/u-boot-socfpga/v2025.04+git/temp/run.do_compile.19724, line 301
PS. I am using WSL2.
In the boot from QSPI section, it is unclear what, if anything I need to do with the SD Card...
Also, on this page:
HPS GSRD User Guide - Altera FPGA Developer Site
The 2 links below don't work.
Prebuilt Binaries¶
The Agilex 5 Modular Development Kit GSRD binaries are located at https://releases.rocketboards.org/2025.08/:
Boot Source LinkSD Card https://releases.rocketboards.org/2025.08/gsrd/agilex5_modular_gsrd/ QSPI https://releases.rocketboards.org/2025.08/qspi/agilex5_modular_qspi/ and, in this section the link to rocketboards doesn't work.
Booting from QSPI¶
This section presents how to boot from QSPI. One notable aspect is that you need to wipe the SD card partitioning information, as otherwise U-Boot SPL could find a valid SD card image, and try to boot from that first.
Wipe SD Card
Either write 1MB of zeroes at the beginning of the SD card, or remove the SD card from the HPS Daughter Card. You can use dd on Linux, or Win32DiskImager on Windows to achieve this.
Write QSPI Flash
1. Power down board
2. Set MSEL dipswitch S4 on SOM to JTAG: OFF-OFF
3. Power up the board
4. Download and extract the JIC image, then write it to QSPI:
wget https://releases.rocketboards.org/2025.08/qspi/agilex5_mk_a5e065bb32aes1_qspi/agilex_flash_image.hps.jic.tar.gz tar xf agilex_flash_image.hps.jic.tar.gz jtagconfig --setparam 1 JtagClock 16M quartus_pgm -c 1 -m jtag -o "pvi;agilex_flash_image.hps.jic"
If you can sort out these issues that would be a great help...
Thanks
Malcolm
- RolandoS_Altera
Hi Malcom
I confirmed that the links in the Agilex 5 GSRD pages pointing to the binaries is incorrect, the correct paths are the following:
Agilex 5 Modular Dev Kit:
SD Card: https://releases.rocketboards.org/2025.08/gsrd/agilex5_mk_a5e065bb32aes1_gsrd/
QSPI: https://releases.rocketboards.org/2025.08/qspi/agilex5_mk_a5e065bb32aes1_qspi/
Agilex 5 Premium Dev Kit:
SD Card: https://releases.rocketboards.org/2025.08/gsrd/agilex5_dk_a5e065bb32aes1_gsrd/
QSPI: https://releases.rocketboards.org/2025.08/qspi/agilex5_dk_a5e065bb32aes1_qspi/
I will fix this in our GSRD pages.
Related to the need of wipe the SDCard, this is only needed when building the binaries using the GSRD flow. This happens because the U-Boot SPL tries to find the u-boot.itb from the different boot devices starting with the SDCard. If you look at the HPS GHRD Linux Boot Examples page (https://altera-fpga.github.io/rel-25.1.1/embedded-designs/agilex-5/e-series/modular/boot-examples/ug-linux-boot-agx5e-modular/#boot-from-sd-card), this line changes the list of devices in which it will try to boot from, keeping only mmc, which corresponds to the SD Card.
sed -i 's/u-boot,spl-boot-order.*/u-boot\,spl-boot-order = \&mmc;/g' arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
Related to the errors that you are seeing when building the binaries, it's possible that a package could be missing in the WSL2 environment when building the RootFS, but what is weird is that in this page https://altera-fpga.github.io/rel-25.1.1/embedded-designs/agilex-5/e-series/modular/boot-examples/ug-linux-boot-agx5e-modular, you just use the rootfs in the Linux boot stage and shouldn't affect that you see something on the serial console. The U-Boot SPL is the first binary that HPS executes and this is included as part of the bitstream provided to the system. This bitstream includes the hardware design(.sof) and the SPL(.hex):
In the case of booting from SD Card:
In the case of Booting from QSPI:
If the hardware design(.sof) and the SPL(.hex) were created correctly, you should be able to see an output from the serial console. here you also need to double-check that in your devkit, the msel is set to QSPI so it can read the bitstream from the QSPI.
If you have problems generating the RootFS, you can get this directly from the Pre-Built binaries included in the correct paths provided above.
Thanks
Rolando
