New Contributor
Regular ContributorHi Brett
Sorry that I might ask some irrelevant question in my previous reply.
For CycloneV you should be using the Arm Compiler 5 which targets the Cortex-A9 on Cyclone V SoC,
Arria V SoC and Intel Arria 10 SoC.
The Arm Compiler 6 targets Cortex-A53 on Intel Stratix 10 SoC and Agilex SoC.
Regards
Jingyang, Teh
New ContributorHi,
@JingyangTeh_Altera wrote:For CycloneV you should be using the Arm Compiler 5 which targets the Cortex-A9 on Cyclone V SoC,
Arria V SoC and Intel Arria 10 SoC.
The Arm Compiler 6 targets Cortex-A53 on Intel Stratix 10 SoC and Agilex SoC.
Could you please point me to Intel literature that states this? It contradicts what I have found. On Intel's Arm Development Studio for Intel SoC FPGA webpage it states:
|
Compilers |
|
|
Arm Compiler 5 |
Included until Arm DS for Intel® SoC FPGA version 2020.1 |
|
Arm Compiler 6 |
Yes |
I cannot find anything stating that the current version of Arm DS (2022.0), which does not include Arm Compiler 5, should not to be used with Cyclone V, or that users need to downgrade to an Arm DS version from 3 years ago in order to have support for Cyclone V.
Granted, I realize that the HWLibs examples use GNU and Arm Compiler 5 and that they have not yet been updated to support Arm Compiler 6. But much/most of the Intel literature/examples/etc. is years out of date and not aligned with the current toolsets.
Again, I have no problem compiling and executing Arm Compiler 6 bare-metal applications from OCRAM, or SDRAM with U-Boot 2017-rc2. The problems are only with newer versions of U-Boot. I don't see how this is an Arm Compiler 6 problem. Something changed in U-Boot which is causing issues.
Thanks,
Brett
