New Contributor
Occasional ContributorHi @Amoon ,
Thanks for your additional inputs.
So, May I assume that you want to know how to write a kernel module that handles input signals on GPIO pins as interrupts?
Which GPIO pins are you targeting, FPGA pins or HPS dedicated GPIO pins?
New Contributorhi @ShoH_Altera
Thanks for your message.
Yes, indeed — I am developing a kernel module that handles input signals via GPIO interrupts, primarily to simulate or test time event (TE) mechanisms. The goal is to receive rising/falling edge events on GPIO and synchronize actions accordingly.
Currently, I am targeting HPS-dedicated GPIOs on the Agilex 7 SoC.
This choice is based on the assumption that these pins are directly controllable and better integrated with the HPS interrupt controller.
However, I remain open to later extending the support to FPGA-assigned GPIOs (via the GPIO bridge), once the system is stable and the correct mapping (.dts) is validated.
