ERROR: Config PwrMgr handoff failed. error -1

Hello

The error that you are seeing is observed in the First Stage Boot Loader(FSBL), which corresponds to ATF in this flow. This is related to the SDRAM bring-up. From the hardware configuration,  some settings (stored in the bitrstream in QSPI) are read by the FSBL and this configures some HPS/EMIF registers to bring some peripherals or the SDRAM. In this case, seems that the problem is related to any incorrect configuration in the hardware design in the pss_sram_power_off() function (https://github.com/altera-fpga/arm-trusted-firmware/blob/socfpga_v2.13.0/plat/intel/soc/agilex5/soc/agilex5_power_manager.c#L42), which is reporting a failure.

Unfortunately, we have not updated the Zephyr GSRD after 24.3, so the instructions in https://altera-fpga.github.io/rel-24.3/embedded-designs/agilex-5/e-series/premium/gsrd_zephyr/ug-zgsrd-agx5e-premium/ have not been tested with Quartus 25.3.

Now, the failure that you see is observed at ATF stage before Zephyr is launched, and we support some flows that also use ATF as bootloader. The flow described in Direct ATF to Linux Boot (https://altera-fpga.github.io/rel-25.3/embedded-designs/agilex-5/e-series/premium/boot-examples/ug-linux-boot-agx5e-premium/#boot-from-qspi_1)  can be used as a reference to build your hardware desgin and your ATF for 25.3 release. You can build these and then use it with your original Zephyr build instructions and see if your error is not longer seen. You can also compare the HPS configuration in Quartus between your current hardware build and the one that you create using the Direct ATF to Linux Boot and identify any difference that could be creating the error that you are seeing.

Please let me know if this information helps you to move forward.

Thanks

Rolando