Contributor
ContributorHi - unfortunately with JTAG programming, this error occurs:
... Loading Environment from FAT... Unable to read "uboot.env" from mmc0:1... Loading Environment from UBI... "Synchronous Abort" handler, esr 0x96000010, far 0x108d2000 elr: 0000000080263ce8 lr : 0000000080263ef4 (reloc) elr: 00000000ffd54ce8 lr : 00000000ffd54ef4 x0 : 00000000108d2000 x1 : 0000000000003228 ... Code: 32000021 d5033fbf b9000001 d65f03c0 (b9400001) Resetting CPU ... ### ERROR ### Please RESET the board ###
Here the u-boot and linux branches are:
git clone -b atuma5_v1.1 https://github.com/terasic/u-boot-socfpga u-boot-socfpga git clone --filter=tree:0 -b atuma5_v1.2 https://github.com/terasic/linux-socfpga linux-socfpga
It is worth also noting, that:
1: It seems doing it this way does let the bitstream load onto the FPGA (based on LED responses)
2: Doing it this way with a base HPS bitstream (with no GTS component) lets the boot sequence finish successfully
Occasional ContributorHi,
Ok I understand the "full test" image also failed to configure over JTAG but we lack more detailed information why.
Can you please confirm the Quartus version you use?
I assume you are using the HPs 1st mode configuration, please confirm.
In this case can you stop at u-boot prompt and manually run fpga load, e.g. according to the u-boot bootcmd (CONFIG_BOOTCOMMAND environment example) in https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-5/e-series/modular/boot-examples/ug-linux-boot-agx5e-modular/#boot-from-sd-card
CONFIG_BOOTCOMMAND="load mmc 0:1 \${loadaddr} ghrd.core.rbf; fpga load 0 \${loadaddr} \${filesize};bridge enable;..
In case of failure it should report an error code and related details, see an example capture below:
Regards,
Stefan
