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Derek_Teng's avatar
Derek_Teng
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1 year ago
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Questions about the descriptors of the Modular Scatter - Gather DMA Core

Hi, When I was reading the "Modular Scatter - Gather DMA Core" chapter in the book "Embedded Peripherals IP User Guide", there is a part that I'm not particularly clear about. I'm not sure if my unde...
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  • KelvinK_Altera's avatar
    KelvinK_Altera
    1 year ago

    Hi Derek,

    @Derek_Teng wrote:

    In the Modular Scatter - Gather DMA Core, when I don't enable the Prefetcher Core, can I write multiple descriptors into the dispatcher FIFO through the Descriptor Agent Port at once? Then, by setting the Go bit in the Control Field of the last descriptor to 1 and starting the DMA transt input in sequence.

    You are right.

    Yours use case do not required the following prefetcher features, you can don't enable prefetcher.

    With Prefetcher enabled, following features are supported:

    • Descriptor linked list
    • Data transfer to non-contiguous memory space
    • Descriptor write back
    • Hardware descriptor polling
    • 64-bit address spaces
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi


The msgdma do not support out of order description completion.

The out of order completion mentioned is within the burst feature, it is confined within the descriptor.

The current descriptor is completed before the next descriptor is being processed.


Regards

Jingyang, Teh


  • Derek_Teng's avatar
    Derek_Teng
    Icon for New Contributor rankNew Contributor
    1 year ago

    Hi, Jingyang,

    Sorry, my question is no longer about MSGDMA, but about the Avalon-MM DMA IP core described in the document "Arria ® 10 or Cyclone ® 10 GX Avalon ® Memory-Mapped (Avalon-MM) DMA Interface for PCI Express* Solutions User Guide".
    The issue of out-of-order completion is related to this IP core. Please help me check if my understanding is correct.