Forum Discussion
- Richard_P3 years ago
New Contributor
Hi Aik,
1) Regarding the jtagconfig, yes it seems to be working fine. He is the output I get:
$ jtagconfig
1) USB-Blaster [USB-0]
02E050DD 10AS066H(1|2|3|3E2|4|4E2)/..
4BA00477 SOCVHPSHere is the output with the --debug option:
$ jtagconfig --debug
1) USB-Blaster [USB-0]
(JTAG Server Version 20.1.0 Build 177 04/06/2020 SC Pro Edition)
02E050DD 10AS066H(1|2|3|3E2|4|4E2)/.. (IR=10)
4BA00477 SOCVHPS (IR=4)Captured DR after reset = (02E050DD4BA00477) [64]
Captured IR after reset = (1551) [14]
Captured Bypass after reset = (0) [2]
Captured Bypass chain = (0) [2]2) The Quartus Programmer Utility detects both devices (see attached image).
I can load the SOF through the JTAG port using Quartus Programmer to configure the FPGA without any problems (see attached image). But after that, when I try to use the quartus_hps utility to erase or program the flash I get the following error:
$ quartus_hps -c 1 -o E
Info: *******************************************************************
Info: Running Quartus Prime Programmer
Info: Version 20.1.0 Build 177 04/06/2020 SC Pro Edition
Info: Copyright (C) 2020 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Mon Oct 16 16:48:51 2023
Info: System process ID: 48860
Info: Command: quartus_hps -c 1 -o E
Current hardware is: USB-Blaster [USB-0]
Found HPS at device 2
Double check JTAG chain
HPS Device IDCODE: 0x4BA00477
Error: Fail to reset Debug
Error: Quartus Prime Programmer was unsuccessful. 0 errors, 0 warnings
Error: Peak virtual memory: 115 megabytes
Error: Processing ended: Mon Oct 16 16:48:54 2023
Error: Elapsed time: 00:00:03
Error: System process ID: 48860Any ideas as to why the JTAG port to the FPGA seems to work just fine, but not to the HPS?
Thanks for your help.
-Richard