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chander's avatar
chander
Icon for New Contributor rankNew Contributor
2 years ago

How to access entire 4GB DDR from Agilex 7 HPS

We have a configuration where the Agilex 7 HPS EMIF interface is connected to 4GB DDR on the board. However the Linux/uboot is able to access only 2GB i.e address 0x0 - 0x7FFF_FFFF, while from F2H Ac...
Arm Processor
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi chander,


Can change the address being used to

<0x2 0x80000000 0 0x80000000> instead as below?


memory {

/* 4GB */

reg = <0 0x00000000 0 0x80000000>,

<0x2 0x80000000 0 0x80000000>;

};


Thanks.

Regards,

Aik Eu


  • chander's avatar
    chander
    Icon for New Contributor rankNew Contributor
    2 years ago

    Hi Aik Eu,

    Do we also need to make changes to the firewall_ddr_fpga2sdram_inst_0_scr registers?
    Could you tell us the changes needed in u-boot-socfpga/arch/arm/mach-socfpga/spl_agilex7.c if any ? We are using AGMF039 device.

    regards

    Chander