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awaissman's avatar
awaissman
Icon for New Contributor rankNew Contributor
1 year ago

Fatal error in Module tennm_noc_fabric_adaptor in file .../sim_lib/tennm_agilex7_io96_ncrypt.sv

Hello, I am trying run simulation for our design after instantiated hps subsystem. Code elaborates but i am getting this error, and it comes from encrypted code: # ** Fatal: (vsim-160) /proj/vendo...
Arm Processor
zener's avatar
zener
Icon for Occasional Contributor rankOccasional Contributor
19 days ago

Was there ever a solution to this? I just got a similar error during an Agilex5 simulation:

# ** Fatal: (vsim-160) /tmp/psgswbuild/nightly/26.1/110/l64/work/questa_fe/eda/sim_lib/tennm_revb_hvio_ncrypt.sv(145): Null foreign function pointer encountered when calling 'simsf_constra3#_mti_copy_opt_#'
#    Time: 0 fs  Iteration: 0  Process: /system/top/u_cpu/u_qsys_top/iopll_0/iopll_0/tennm_ph2_iopll/tennm_ph2_iopll_encrypted_inst/#INITIAL#145 File: /net/server/tools/altera/quartus/v26.1.0.110_pro/questa_fse/linux_x86_64/../intel/verilog/src/tennm_revb_hvio.sv
# Fatal error in Module tennm_ph2_iopll in file /net/server/tools/altera/quartus/v26.1.0.110_pro/questa_fse/linux_x86_64/../intel/verilog/src/tennm_revb_hvio.sv

 

  • mguran's avatar
    mguran
    Icon for New Contributor rankNew Contributor
    14 days ago

    I'm also getting this error.   Based on earlier warnings in the compile process, it looks like it's related to DPI library dependencies in the PLL.  I've tried placing -dpiheader arguments in the vsim command, but no luck. 

     Anyone know how to properly include precompiled DPI libraries in questa sim?

     

     

    # ** Warning: (vsim-3770) Failed to find user specified function 'simsf_constra3' in DPI C/C++ source files.

    ...

    # ** Fatal: (vsim-160) /tmp/psgswbuild/nightly/24.3/212/l64/work/questa_fe/eda/sim_lib/tennm_revb_hvio_ncrypt.sv(132): Null foreign function pointer encountered when calling 'simsf_constra3#_mti_copy_opt_#'

    # Time: 0 ps Iteration: 0 Process: /adc_interface_tb/adc_interface/gen_adc_receive(0)/n_adc_rec/intel_lvds_0/core/arch_inst/pll_inst/internal_pll/tennm_ph2_iopll/tennm_ph2_iopll_encrypted_inst/#INITIAL#132 File: /home/mguran/intelFPGA_pro/24.3/questa_fse/linux_x86_64/../intel/verilog/src/tennm_revb_hvio.sv

    # Fatal error in Module tennm_ph2_iopll in file /home/mguran/intelFPGA_pro/24.3/questa_fse/linux_x86_64/../intel/verilog/src/tennm_revb_hvio.sv

    • RichardT_altera's avatar
      RichardT_altera
      Icon for Super Contributor rankSuper Contributor
      11 days ago

      Thank you, kbrunham_altera​  for the suggestion.

      mguran​ please try the suggestion provided by kbrunham_altera and let us know if it works.

      If the issue persists, please provide the design QAR file (Project > Archive Project) and the testbench so we can reproduce the issue and investigate further.

    • RichardT_altera's avatar
      RichardT_altera
      Icon for Super Contributor rankSuper Contributor
      5 days ago

      Hi mguran​ 

      Do you have any update on this?

      Regards,
      Richard Tan