Forum Discussion
driver for HPS I2C Hardware in u-boot 04.2020 deactivates clocks
- 4 years ago
Hello,
We had a similar problem trying to migrate to the socfpga_v2021.04 branch of uBoot. We have an on-board EEPROM (I2C) that contains factory configuration data that is needed during the uBoot TPL phase.
We are seeing that the designware_i2c I2C controller is resetting the l4_sp_clk when it is removed prior to starting the linux kernel. The result is that there is a bus hang when the kernel tries to access the UART peripheral (which needs that clock). The kernel we are trying to use is from 4.9.78-ltsi. It's possible that later versions of the kernel properly re-enable the l4_sp_clk, but this doesn't seem to be the case for our particular configuration (which works fine with uboot 2014.10). We also had to set the socfpga_legacy_reset_compat=1 uBoot environment variable as well, as without it this version of uBoot will reset all the peripherals as it switches to linux, resulting in a similar hang.
Our work-around can be found in this patch here:
Critical Link LLC git repositories. - u-boot-socfpga.git/blobdiff - drivers/i2c/designware_i2c.c
-Mike
Hi,
Have you reassigned in the device tree (included where memory is define), that your i2c is using:
&i2c0 {
clocks = <&clk_virt_l4_sp>;
}
Instead of for example GHRD's :
&i2c0 {
clocks = <1000000>;
}
Hi Eberlazare
Please have a look to the file attached in the previous answer!!!!!!!!!
I added clocks = <&clk_virt_l4_sp>; to the i2c1 device because the EEPROM which i would use on the DevKit is connected on i2c1 and not i2c0. Do you still think i2c0 is the right place for clocks = <&clk_virt_l4_sp>; ? And what do you think is the reason for that?
Please could you put me in touch with an expert from intelFPGA to assist me for solving that issue? Otherwise it seems that we will not be successful!
Thanks
Silvan