Forum Discussion
DMA plan on the Agilex5
- 1 year ago
Hi,
Q1: "Would this [UART firmware programming] be achievable via device tree edits?"
Not directly. The device tree (DT) describes the hardware for Linux — it’s used by the kernel to understand available peripherals like UART, memory regions, DMA, etc. It does not affect how bootloaders or firmware tools work.
In terms of UART firmware burning, DT changes won’t enable UART-based firmware flashing unless:
You're writing a custom bootloader or application that reads firmware data via UART and writes it to flash.
You use DT to mark certain memory regions as non-cached (helpful if the loader runs under Linux).
Q2: "If I understand correctly, you are saying that /dev/mem does not flush/handle cache in any way?"
Correct.
/dev/mem provides raw access to physical memory — but:It bypasses Linux’s cache coherency management.
Reads/writes using /dev/mem do not flush or invalidate the CPU cache.
This means if DMA wrote data to memory, but cache holds stale data, a read from /dev/mem may show incorrect results unless:
You manually flush/invalidate the cache in user space (not trivial).
Or you map the memory as non-cacheable (preferred approach).
Recommendations for DMA Testing with Cache Coherency:
Use dma-coherent memory:
In DT: use dma-coherent; or map memory via dma_alloc_coherent() if in kernel driver.
Mark OCM region as non-cacheable via DT:
E.g., using no-map; and specifying memory-region entries.
Avoid caching in /dev/mem mappings:
Use mmap() with O_SYNC and MAP_SHARED to minimize caching.
Flush/invalidate cache manually:
Possible from kernel space.
User-space solutions are hacky and not guaranteed.
Yes, your plan is quite reasonable and aligns with a common approach for validating simple DMA flows using Intel’s Modular SGDMA (mSGDMA) IP on SoC platforms like Agilex-V. You’re approaching this the right way by minimizing custom logic and using /dev/mem to manipulate and validate memory contents.
Here are some thoughts and sanity checks:
- mSGDMA Setup: Ensure that your mSGDMA is configured in memory-mapped to memory-mapped mode, with Avalon-MM ports connected to both OCM blocks properly. Avoid scatter-gather mode for this test.
- Memory Region Mapping: Make sure the OCM blocks are mapped to accessible physical addresses and not optimized away or restricted by MMU settings in Linux.
- Be aware of potential issues with cache when using /dev/mem on a Linux system.
- Use dma-coherent memory or flush/invalidate the cache before/after DMA if required (or mark the region as non-cacheable via device tree or MMU settings if needed).
- You'll need to write to the mSGDMA’s control/status registers through /dev/mem too, to provide the transfer descriptor: source addr, dest addr, length, start, etc.
- This part is often trickier than expected. Ensure you’ve got the right base address and offsets from the Platform Designer output.
- OCM blocks must be large enough and have enough address range to hold your test patterns.
- Align your transfers to word boundaries expected by the DMA.
Suggestions:
- Add small test patterns like 0xAA55AA55 or a known incrementing pattern to easily spot transfer errors.
- Start with a small transfer size (e.g., 16–64 bytes) and scale up once the mechanism is confirmed.
- Use hexdump or a simple userspace C program for /dev/mem access to make reads/writes easier and more repeatable.
Points of Caution:
- mSGDMA might not complete the transfer if any part of source/destination addresses is incorrect or misaligned.
- /dev/mem might be blocked or restricted depending on your kernel config — check permissions or run as root.
- Some Agilex SoC configurations need proper HPS handoff from the bootloader to allow memory-mapped access cleanly.
Hi JitLoon,
Thanks for your reply - very useful! I have a few questions, I hope it's ok:
On point 2: would this be achievable via device Tree edits?
On point 3: if I understand correctly you are saying that dev/mem does not flush/handle cache in any way?
Many thanks,
K
(By the way, sorry, I had to make another account as the phone with my old my authenticator app is having issue