Forum Discussion
ContributorCustom board on Cyclone V HPS SDRAM preloader test
The final result is that even with a fly-by routed topology there are no issue on both 1.5V and 1.35V DDR3 DDR3L.
The MT41K128M16 /w 1k page size shows no sanity issue on memtest stresapptest on distro.
UBOOT memory normal test also passed w/o any errors.
So after short testing we can only assume there are inherent bug on Quartus 18.1? or HPS IP.
No matter it is /w or /wo the board settings no drop no crash no stuck.
So the case ends here.
Regular ContributorHi
Sorry for the late reply, I was OOO the last week.
The fly-by topology is not supported for DDR3 in all Cyclone V and Arria V device
Regards
Jingyang, Teh
ContributorNo your information is only based on words of the documents.
But what altera reference had done is violated what the document said.
Can you see the image attachment?
https://community.intel.com/t5/Programmable-Devices/Custom-board-on-Cyclone-V-SoC-HPS-SDRAM-topology-unclear/m-p/1703953#M100767
I am completely lost and so confused with the actual hardware result (not simulation not just theory level).
What we had tried is also mentioned in that ticket.
If leveling is not allowed then it is supposed to fail no matter how on the fly-by /w two die in fly-by layout.
But results are not align it can passed all stress test with thermal profile 60 degree so fast slow corner are all passed.
The only differences are the DDR3 die is 1K page or 2K page in previous fails.
