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CAlex's avatar
CAlex
Icon for Contributor rankContributor
3 years ago
Solved

Can't debug the spl for cycloneVsoc dev kit

Hi, I followed the insruction on Rocketboards.org hwlib for cycloneVsoc on the environment of Quartus PRIME 18.1, soceds 22.1. I failed to debug the spl made from my project,here is the error infor...
Hps Boot
  • CAlex's avatar
    CAlex
    2 years ago

    Hi,

    I solve the problem,

    It is duel to the unfunctional of the PLL setting of FPGA.

    I ignored the SDC warning caused this problem.

    Sorry to take your time, please do whatever you need to this thread.

    Thank you.

CAlex's avatar
CAlex
Icon for Contributor rankContributor
3 years ago

Here is the information from the terminal:


U-Boot SPL 2020.07-08705-g35d7cfb999-dirty (Aug 28 2023 - 15:28:23 +0800)
SDRAM calibration failed.
### ERROR ### Please RESET the board ###