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ALT3224's avatar
ALT3224
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2 years ago
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Arria10 SoC U-boot: How to configure DDRAM memory from 1GB to 4GB in version 23.2 PRO

Hi everyone,
I executed the tutorial Building Bootloader for cyclone V and Arria 10
on the evaluation board successful
Now, I need to modified the u-boot for my customer board.
My environment is Arria 10 SoC, intelPro FPGA version 23.2 and I have a question
Which changes are required in the u-boot software for configure the default DDRAM memory from 1GB to 4GB?
I changed the memory node in the file xx.dtsi
memory {
#address-cells = <2>;
#size-cells = <2>;
reg = <0 0x00000000 0 0x80000000>, /* 2GB */
<1 0x80000000 0 0x80000000>; /* 2GB */
};
After built and loaded the u-boot I received a warning message about mismatch in the memory size
There are 2 possibilities, the node definition is incorrect or I'm missing other changes.
your help will be appreciated
Thanks in advance.
Regards

Nora

Sw Development

9 Replies

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi Nora


    The changes in the device tree looks good at the moment.

    Did you increase the DDR size in the Hardware Design too?


    Regards

    Jingyang, Teh


    • ALT3224's avatar
      ALT3224
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hi Jingyang,

      yes, I increased the DDR size in the Hardware Design

      If my memory node definition is ok , I assume that I'm missing some change

      How to configuring DDR in u-boot ?

      Best regards,

      Nora

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi Nora


    Is it ok if you could share with us your quartus project?

    Could you also share with us the error message that you are seeing?


    Regards

    Jingyang, Teh


    • ALT3224's avatar
      ALT3224
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hi Jingyang,

      Currently, I'm checking a new quartus project, probably it wil resolve the problem

      Which tool can I use to create the device tree in version 23.2 ?

      Best regards,

      Nora

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi Nora


    There are no specific tool to generate the device tree for the Arria10 Soc.

    One method to make the changes is to edit the GSRD available for the Arria10 Soc.

    You could get the GSRD from the link below:

    https://www.rocketboards.org/foswiki/Documentation/Arria10SoCGSRD


    The device tree for uboot are in the location:

    https://github.com/altera-opensource/u-boot-socfpga/tree/socfpga_v2023.07/arch/arm/dts


    The linux device tree is located in the location below:

    https://github.com/altera-opensource/linux-socfpga/tree/socfpga-6.1.55-lts/arch/arm/boot/dts


    Regards

    Jingyang, Teh


  • ALT3224's avatar
    ALT3224
    Icon for New Contributor rankNew Contributor
    2 years ago

    Hi Jingyang,

    Thanks for your fast answer

    Regards,

    Nora

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi


    Since there are no feedback for this thread, I shall set this thread to close pending. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


    If you happened to close this thread you might receive a survey. If you think you would rank your support experience less than 4 out of 10, please allow me to correct it before closing or if the problem can’t be corrected, please let me know the cause so that I may improve your future service experience.


    Regards

    Jingyang, Teh