Wrong results when running design on hardware

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Your problem is very likely not caused by host compilation, but rather a race condition or some other issue that does not show up in the emulator (and there are a lot of them).

I have so far encountered two such cases:

- Two kernels running in parallel, one updating an off-chip memory location and then sending a "completion" flag to the other kernel, and then the other kernel reading that memory location. This will work correctly in the emulator, since the emulator does NOT emulate concurrency, but will produce incorrect results on the actual FPGA.

- Accidentally reducing the scope of a variable more than necessary. For example in the following code, the output will be 10 on the emulator, but it will be 0 on the FPGA:

int sum = 0;
for (int i=0; i<1; i++)
{
  int sum = 10;
}
printf("%d", sum);

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Hi

So we can't solve the data race problem on the FPGA unless we run it in serial? That's a bummer...

And for the second case, it seems to be a very common usage, surely not every for loop will go wrong?