Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHi HRZ,
Yes, my design falls into the first case you mentioned. I thought that adding a fence on global memory would ensure consistency, i.e. something like this was initially added in my design: Kernel updating off-chip memory:
void Krnl_Store( ... ) {
...
// writing to global-memory location
write_mem_fence(CLK_GLOBAL_MEM_FENCE);
write_channel_altera(chan_Store2GG_ack, 1);
...
}
Kernel reading off-chip memory:
void Krnl_GG( ... ) {
...
ack = read_channel_altera(chan_Store2GG_ack);
// reading from global-memory location
...
}
It seems adding a fence in the writing kernel doesn't work, so, what would be a possible solution for this case? Thank you, Leonardo