Altera_Forum
Honored Contributor
11 years agoWriting SDRAM from custom IP using Avalon MM write Template
Hello,
I want to write SDRAM through my custom hardware IP. I am using the Master Templates for this. I am writing using custom hardware and reading using NIOS, but my nios doesn't read the correct value. Below is my code for writing into SDRAM. I want to write on the click of a button (coe_switch[3]). I have one more doubt, "myBuffer_control_write_write_base" should be the base address for SDRAM or offset or base+offest.reg searchForSync;
always @(posedge csi_clk or negedge rsi_rst) begin
if(!rsi_rst) begin
click <= 0;
searchForSync <= 0;
end else begin
if(coe_switch == 0) begin
searchForSync <= 1;
myBuffer_control_write_fixed_location <= 0;
myBuffer_control_write_write_base <= 32'h00000000;
myBuffer_control_write_write_length <= 8;
myBuffer_control_write_go <= 1;
myBuffer_user_write_buffer_input_data <= 1;
myBuffer_user_write_write_buffer <= 1;
end
if(searchForSync == 1) begin
myBuffer_user_write_buffer_input_data <= 1;
myBuffer_user_write_write_buffer <= 1;
myBuffer_control_write_go <= 0;
end
end Please let me know if I am doing something wrong. Please suggest.