ldm_as
Occasional Contributor
6 years agoWrapper for a module -> any automation?
Hi All,
Is there any automation for writing a Verilog wrapper for another Verilog/VHDL module?
Thank you!
Hi,
If it is Intel FPGA IP, there is a wrapper auto generated by the software. If it is a user defined module, user have to write their own wrapper file.
Thanks.