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ldm_as's avatar
ldm_as
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
Solved

Wrapper for a module -> any automation?

Hi All, Is there any automation for writing a Verilog wrapper for another Verilog/VHDL module? Thank you!
  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    6 years ago

    Hi,

    If it is Intel FPGA IP, there is a wrapper auto generated by the software. If it is a user defined module, user have to write their own wrapper file.

    Thanks.

KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

If it is Intel FPGA IP, there is a wrapper auto generated by the software. If it is a user defined module, user have to write their own wrapper file.

Thanks.