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Altera_Forum
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15 years ago

working with Quartus 8+Synplify DSP + Synplify PRO

Hi all, I'm working on a undergraduate final project, and I use SynplifyDSP to implement a video improvement algorithm. The problem I faced - In my algorithm I have to access external memor...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

As I'm using GiDEL card - I have many warnings that are related to their parts of the project (including timing error). But I don't use these parts, they are declared but that's it.

What I see is that all my data outputs from the blocks are stuck at GND,

even though input to it are correct (I used SignalTap to see these results)

I want to remind you that my project was already working - except it didn't hold timing - when I combined the entire project in SynplifyDSP and not in Quartus (meaning - I combined before I synthesized) so I'm somewhat beliving that the problem is somewhere with my usage of the tools - not a design problem... :confused:

But again.. I could be wrong.

Ps - not so much related - is there a way to automatically insert registers? Or must I register manually every connection?

thanks again!