working with Quartus 8+Synplify DSP + Synplify PRO

I tried to do this today -

I created a Quartus project for each of the parts, synthesized it (I choose to export qxp file post synthesis)

I then went to my main project. I couldn't find a way to insert the qxp file without having instance of each one of the blocks - so I created some bdf files (one file per part - each contains the same ports as are in the real implementation, and I just shorted the output ports to GND).

I ran the Analyze and elaborate - and then I imported the qxp into each of the parts using the partition import (btw - I have several instances of every part - I just imported to each one of them the same implementation)

I wanted to ask - is this the correct way to work with QXP?

I did get every part to hold timing requirement like I need tough...

and then I got to the main problem - After compiling the entire project I got the "Couldn't fit design into device" error - I need to use one DSP block more than I have... this didn't occur when I compiled the entire project before.

I tried turning off the option that converts 'mult and add' to dsp implementation in the Synthesis options - still no good.

Is there anything else I could try? or I don't have any other options and I must change things in the algorithm itself?

P.S. I'm using GiDEL card - with Altera ep2s180f1020c3

thanks...