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Altera_Forum
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16 years ago

Wireless Transmission using Cyclone II FPGA (Verilog HDL)

The data that is to sent out from the FPGA is in 8-bit form. Whereas the encoder on the transmitter circuitry can only receive 4 bits. Different coding have been tried but it just does not seem ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

data that is to be sent from the DE1 board is ASCII codes and morse codes

whereas the encoder only has 4 data pins

how to divide the 8-bit data into 4-bit so that it can be sent twice?

and what about the receiver part?

how to store the received data and combine it again into the 8-bit data?