Altera_ForumHonored Contributor9 years agoWill Quartus ever support Verilog hierarchical parameter referencing? Hello, module p { parameter x = some expresssion; ... } p p_inst(); localparam x = p.x; This would be really useful i.e. read as essential for what I am trying to do. A...Show More
Recent DiscussionsInterfacing Avalon Streaming FIFO IP with GTS Ethernet Hard IPInvalid license key (inconsistent authentication code)Regarding the issue of UFM not startingram retimingReset Release IP for Agilex needs Stratix 10 device files installed!