DVonA
New Contributor
6 years agoWhy is this wire not driven in functional simulation?
Hello
I am trying to implement a basic UART transmitter in the project "uart_test" attached. The top level entity has two blocks, "baud-generator" and "uart-transmitter".
During simulation, I plot the accumulator register in the block "baud_generator" and get the expected result. However, the plot window shows an "X" output for the node "clk_out" (even though this output is assigned to accumulator bit 16 - baud_accumulator[16] - in "baud_generator").
I'm not sure what I set up incorrectly in the simulation?