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Altera_Forum
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13 years ago

Why is StratixIVGX device's compilation time so long?

Device: EP4SGX180 Software: QuartusII 11.1 + sp2 Resource uage: about 60% The compiling time is more than 1 hour, why?
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

For a M4 Stratix V, 30% logic and 75% RAM used, compilation time is about 2h30 on a core i5. Altera documentation indicates 12 Go of RAM recommended. I upgraded RAM from 4 to 10 Go but the result was the same (hard drive access during fitter). Last upgrade to 14 Go does not change anything !!

I don't consider my PC slow as well. Many softwares are able to process kindly with parallel CPUs but Quartus doesn't and that's the real issue (I don't know performances of other FPGAs vendors, but I guess it' identical).

Got now to optimize to use incremental and rapid features.