Forum Discussion
KhaiChein_Y_Intel
Regular Contributor
5 years agoHi,
Yes. You are correct. If you want to continue using this IP, you have to stay with 15.1.
Besides this, there is an example for Verilog HDL: Adder/Subtractor
https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/verilog/ver-add-sub.html
Thanks.
Best regards,
KhaiY
- Mark_Zvilius5 years ago
New Contributor
The UG-01063 document ... https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_lpm_alt_mfug.pdf
says that lpm_add_sub is supported for Max 10 devices. Please clarify...