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Altera_Forum's avatar
Altera_Forum
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14 years ago

Why index cannot fall outside?

The following is my code for nixie tube's driving.

At line"$" their is an error clew"Error (10251): Verilog HDL error at MyDAQCard.v(120): index 15 cannot fall outside the declared range [7:0] for dimension 0 of array "CST"".

My cst_reg.txt contents:

100110001001011010000000 11110100001001000000

000000011000011010100000 00000010011100010000

000000000000001111101000 00000000000001100100

000000000000000000001010 00000000000000000001

I want know why j>=0 is wrong at verilog?Thanks a lot.

reg [3:0] dataout_memo[7:0];

reg [31:0] CST[7:0];

reg [3:0] i,j;

reg [31:0]data_reg;

reg flag;

always @(posedge clk)

begin

data_reg = data_in;

$readmemb("cst_reg.txt",CST);

for(j=7;j>=0;j=j-1) //" $$$$$$$$$$$$$$$$$$$$$$"

for(i=1,flag=0;i<=9;i=i+1)

if(data_reg>=CST[j])

begin

data_reg = data_reg - CST[j];

dataout_memo[j] = i;

flag = 1;

end

else if(!flag)dataout_memo[j]=0;

dataout_memo[0] = data_reg; // handle:j=0 "@@@@@@"

data_reg = 1'b0;

end

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    --- Quote Start ---

    I want know why j>=0 is wrong at verilog?

    --- Quote End ---

    It's not wrong with Verilog. But loop evaluation fails according to your signal definition reg [3:0] i,j; Verilog numbers are unsigned by default, so j>=0 is always true. Iteration schemes are evaluated at compile time, there is no need to define loop variables as bit vectors. Use an integer type instead.

    Assigning dataout_memo in a loop prevents it's implementation as internal RAM. I'm not sure if this is what you intend.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Thank you dude. It's a new error if "i,j" are integers.:"Error (10249): Verilog HDL Declaration error at MyDAQCard.v(107): objects with integer type cannot be declared with a range".

    How to clear that? I tried my "for" loops at vc++environment, j>=0 is right,and line "@@@"is no need to write at vc++ . &#65307;&#65289;

    i need that dataout_memo[0]( j=0) as the unit data on nixie tube.

    Can u help me to handle this ?

    for(j=7;j>=0;j=j-1) // $$$$$

    for(i=1,flag=0;i<=9;i=i+1)

    if(data_reg>=CST[j])

    begin

    data_reg = data_reg - CST[j];

    dataout_memo[j] = i;

    flag = 1;

    end

    else if(!flag)dataout_memo[j]=0;

    dataout_memo[0] = data_reg; // @@@@

    data_reg = 1'b0;

    Thank you!
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    I don't see an integer declaration with a range in your last post (there are no declarations at all). I also don't know why it should be needed. Generally, if reporting any compilation errors, it would be a good idea to mark the line of error.