Forum Discussion
Altera_Forum
Honored Contributor
8 years agoTQ has "sub-models" to account for on-die variation. For example, let's say we're at the Slow Hot timing model where TQ gives a worst case delay for something. In reality, that is the worst possible delay but if you look at a bunch of delays they will actually vary and many won't be that bad. This is on the same die at the same voltage and temperature. So within a given timing model, there is a fast and slow sub-model. When doing setup analysis, TQ will use the slow sub-model for Data Arrival and the fast sub-model for Data Required. This gets flipped when you do hold analysis on the same path.
But how is it possible the same element has two different delays at the same time? It isn't. The entire analysis is done as above, and then something called CCPP(Common Clock Path Pessimism) removal comes in and removes the variation on the clock path that is physically the same in the Data Arrival and Data Required. I don't see it in your screen-shots, but it should add up to the differences you're seeing. (There was an issue for ssync outputs where the CCPP removal only removed up to the PLL output and not past that, but I believe that has been fixed). This has confused many an engineer, including myself, but is the way it's done.