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JBrod6's avatar
JBrod6
Icon for New Contributor rankNew Contributor
6 years ago

Why does the Platform designer On-Chip Flash Intel FPGA IP memory map differ from the .rpd file map generated by the Convert Programming File tool. What address should be used to program the CFM? MAX10 device - 10M40DCF256C8G

This is the map from the IP:

This is the map from the rpd .map file:

BLOCK START ADDRESS END ADDRESS

ICB 0x00000000 0x00001FFF

UFM 0x00002000 0x000B9FFF

CFM0 0x000BA000 0x00161FFF (0x0010B353)

Max 10 Setting:

EPOF: OFF

Verify protect: OFF

Watchdog value: Not activated

Configure device from CFM0 only: OFF

POR: Instant ON

IO Pullup: ON

SPI IO Pullup: ON

Notes:

- Data checksum for this conversion is 0x1207EE84

- All the addresses in this file are byte addresses

1 Reply

  • ShafiqY_Intel's avatar
    ShafiqY_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi JBrod6,

    The .map file memory map is differ from On-Chip Flash Intel FPGA IP memory map because .map file is add ICB information in pof file.

    In On-Chip Flash Intel FPGA IP, UFM start at 0x00000000.

    In .map file, UFM start at 0x00002000

    0x0-0x1FFF is used for ICB information. Thus, UFM need to start at 0x2000.

    I hope this is clear.

    Thanks😉