Forum Discussion
SDmel
New Contributor
6 years agoBoth methods I tried still I am getting same error message
AnandRaj_S_Intel
Regular Contributor
6 years agoHi,
Can you see the size difference in sof file before and after adding the stp file?
Have you enabled Signal-Tap Logic analyzer under setting?
Can you delete the db, increment db, signal-tap and sof files.
And recompile the design and create new signal tap with minimum signals and check.
Regards
Anand