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FWang44's avatar
FWang44
Icon for New Contributor rankNew Contributor
6 years ago

Why do I use FPGA to compile a program with different results?

Or if the A signal is perfect, I move another B signal that is not relevant. After compiling, A is useless. Timing is correct. . Please ask the relevant personnel to guide me. Many people around me have such problems.Or if the A signal is perfect, I move another B signal that is not relevant. After compiling, A is useless. Timing is correct. . Please ask the relevant personnel to guide me. Many people around me have such problems.

2 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    6 years ago

    Without seeing a design or code to try, there is no way to answer your question. There are many factors that affect how a design gets compiled or recompiled. Can you provide an example of what you're talking about?

    #iwork4intel