Forum Discussion
FWang44
New Contributor
7 years agoWhy do I use FPGA to compile a program with different results?
Or if the A signal is perfect, I move another B signal that is not relevant. After compiling, A is useless. Timing is correct. . Please ask the relevant personnel to guide me. Many people around me h...
sstrell
Super Contributor
7 years agoWithout seeing a design or code to try, there is no way to answer your question. There are many factors that affect how a design gets compiled or recompiled. Can you provide an example of what you're talking about?
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