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Altera_Forum's avatar
Altera_Forum
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12 years ago

which part of data in ethernet frame should be passed to CRC generator?

after pass payload to CRC generator, wireshark do not receive any ethernet frame i guess wrong, i do not know where to check, i am afraid that ethernet port in PC side drop the frame from FPGA whe...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I don't really understand where the '2' in m_rx_d2 and m_rx_en2 is coming from, and why m_tx_en2 is an input.

Except for that, it seems that none of the problems I've listed in post# 8 have been addressed.