Forum Discussion
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- When you make a project, you specify a working directory. You can find that directory path along the top of your Quartus window. Your verilog or vhdl files will be in there. Files produced by Quartus will be in a folder within that directory called "output_files" see image --- Quote End --- That is not exactly right. your hdl design can be anywhere and you point to it in project settings (add files) or in command line. I noticed if you work with tcl commands quartus appends paths in qsf but keeps old ones and so may point to old files.