When using quartus_ipgenerate I get an error stating "Argument list too long" on Linux.

I didnt see any error when tested on a design. ***************************** Info: Command: quartus_ipgenerate --generate_project_ip_files --synthesis=vhdl --clear_ip_generation_dirs top Info: Using INI file /home/gbng/quartus.ini Info: Found 4 IP file(s) in the project. Info: IP file /data/gbng/test_ipgenerate/test_S10/mult_w8.ip was found in the project. Info: IP file /data/gbng/test_ipgenerate/test_S10/multi_adder_test.ip was found in the project. Info: IP file /data/gbng/test_ipgenerate/test_S10/ip/qsys_top/qsys_top_clock_in_0.ip was found in the project. Info: IP file /data/gbng/test_ipgenerate/test_S10/ip/qsys_top/qsys_top_reset_in_0.ip was found in the project. Info: Finished generating IP file(s) in the project. Info: Previously generated synthesis files were detected in the Platform Designer IP file generation directory (/data/gbng/test_ipgenerate/test_S10/mult_w8). Info: Skipped generation of synthesis files for the Platform Designer IP file /data/gbng/test_ipgenerate/test_S10/mult_w8.ip based on the current regeneration policy setting (Tools/Options/IP Settings). Info: Previously generated synthesis files were detected in the Platform Designer IP file generation directory (/data/gbng/test_ipgenerate/test_S10/multi_adder_test). Info: Skipped generation of synthesis files for the Platform Designer IP file /data/gbng/test_ipgenerate/test_S10/multi_adder_test.ip based on the current regeneration policy setting (Tools/Options/IP Settings). Info: Previously generated synthesis files were detected in the Platform Designer IP file generation directory (/data/gbng/test_ipgenerate/test_S10/ip/qsys_top/qsys_top_clock_in_0). Info: Skipped generation of synthesis files for the Platform Designer IP file /data/gbng/test_ipgenerate/test_S10/ip/qsys_top/qsys_top_clock_in_0.ip based on the current regeneration policy setting (Tools/Options/IP Settings). Info: Previously generated synthesis files were detected in the Platform Designer IP file generation directory (/data/gbng/test_ipgenerate/test_S10/ip/qsys_top/qsys_top_reset_in_0). Info: Skipped generation of synthesis files for the Platform Designer IP file /data/gbng/test_ipgenerate/test_S10/ip/qsys_top/qsys_top_reset_in_0.ip based on the current regeneration policy setting (Tools/Options/IP Settings). Info: Quartus Prime IP Generation Tool was successful. 0 errors, 3 warnings Info: Peak virtual memory: 947 megabytes Info: Processing ended: Tue Apr 9 19:29:16 2019 Info: Elapsed time: 00:00:12 *********************************** Could you attach the full generation message?