When is it safe to use smart recompilation?

Also, before asking qu estions about​ the design and debugging it, would it not be possible to start by answering the question of whether smart compilation guarantees functionality to begin with?

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In case it is supposed to guarantee functionality, then the following information may be important:

The parameters I am changing are all declared in a .vh file which is included in all my verilog files.​ While the .vh file is in the project directory, it is not included in the project. Could it be that Quartus then interprets all files in the project as untouched since the last compilation and therefore skips all of them in the compilation, effectively ignoring the changes in the included .vh file?