Forum Discussion
Altera_Forum
Honored Contributor
15 years agoYou hooked up the SSRAM off-chip address bits 18..0 it seems. The tri-state address bus is byte addressed but since you have a x32 SSRAM you need to connect the 20..2 to your 19 off-chip address lines. It happens to be working with IOWR/RD_32DIRECT because there are two issues cancelling out.
The tri-state addresses are byte addressed because it needs to work with multiple off-chip devices with varying widths. See page 54 in this doc for more details: http://www.altera.com/literature/manual/mnl_avalon_spec.pdf In a nutshell you probably need to take the 21 bit SSRAM address coming out of SOPC builder and right shift it 2 bits and connect it to the SSRAM. Then you would have to fix the code performing the IORD/WR_32DIRECT accesses. You can take a look at this design to see what to do at the top level to ensure you are sending the correct address bits off-chip: http://www.altera.com/support/examples/nios2/exm-high-perf-bridge.html