What is/are the right SOPC compenent(s) for my project?

Hi,

I think I'm on a good way to finally get what I need.

The tip to turn the response port "off" solved the problem that nothing happened. But now, when I read the SRAM memory content triggered by the interrupt of the SGDMA, I can verify that the ADC data is written to the SRAM but with a "stride" of 4.

So the ADC content (32 bit wide) is written to address 0x00, 0x04, 0x08, . . . .

In between, the memory is untouched. On addres 0x01 - 0x03, 0x05 - 0x07, ... I still can read the contents that my SRAM test routine has written to the memory.

I played a little bit with the parameters of the SOPC blocks, but I had no success in solving this issue. In the attachments you can see the settings of each block.

Maik.