Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks again for the helpful conversation!
Well, yes, I would like that sampled data in memory be processed by the CPU. I agree that at 80Mhz the CPU can go that pace and it would be possible to run the whole system at one speed. But what if I go a step further with my ADC/SGDMA/SRAM clock and run it at say 125MHz? I can imagine that the Nios CPU won't take that high speed at some point (in a Cyclone III device). I know that I can't process the ADC data continiously with the CPU when the CPU is slower but I can make a fast shot of a couple of thousand samples and after that I can process the data at a slower pace with the CPU (maybe a FFT implemented in software in order to save LEs that I would need for a hardware FFT module). I have relative fast signals to process but the results of the processing have not to be faster than say 10Hz. So a combination of a fast sample shot and a relativ slow processing of the data after that would be what I need. I'm right now trying to test the possibilities if this works as I imagine it. Please, feel free to give me advises if I , in your opinion, am not thinking in the right directions. Regards, Maik